AGND and DGND connection using flash ADC, totally stumped

Question

So, I am designing a PCB with the classic scenario of having both sensitive analog signals and noisy digital signals...

• Analog and digital regions are separated. the have their own gnd planes and isolated supply's.
• A flash ADC is the information bridge from the analog side to the digital side.

I have tried to find the answers to this but I keep seeing the same thing. which basically this photo in summary:

Now this shows the star ground at the ADC.

Why does it have to be close the ADC? I would think that you would want the connection between the regions as far away as possible from any kind of noise if in fact the connection is just there so the digital and analog reference don't drift apart and damage the ADC...

My thought is that depending on the ADC, like a SAR or Sigma-Delta ADC, you really need the DGND to be exactly the same as AGND for it work correctly... hence why the star is near the ADC.

But for Flash and Dual-Slope ADC, AGND does NOT need to be in reference to DGND. the only the thing going from the analog to digital portion is small leakage current on the comparator/opamp inputs (photo below shows configuration or the ADC I am using).

Do I still need to put the star near the ADC this case?

Thanks for your help,my brain hurts from thinking about this.

Answer 1

The whole separation of grounds thing is a common source of misunderstanding and cargo cult engineering. Except for devices that are specifically designed to provide isolation (IE, digital isolators, isolating amplifiers), all of the ground pins on an IC, regardless of what they're labeled, are really the same ground. They are labeled differently because they carry the ground currents for different parts of the IC, so in the case of an ADC, the AGND pins carry ground currents from the analog section, and the digital ground pins carry ground currents from the digital section. Likewise with power devices like amplifiers, you may have 'power ground' and 'signal ground', which simply tells you that some pins carry large currents from the power stage, whereas other pins only carry the much lower currents used in the front end.

So the reason that the AGnd/DGnd bonding point is right at the ADC in your diagram, is that the two pins really need to be at the same potential. If you had a long path between the ADC's DGND to some far away star ground point, and then a long path back through the analog ground plane to the ADC's AGND pin, there's the opportunity for a potential difference to appear between the two pins which can lead to disruptive or damaging currents flowing between the analog and digital sections of the IC.

There is of course a larger question implied in your post, which is why and how you should separate the analog and digital grounds overall to begin with. Generally, even though this goes against the prevailing wisdom of a LOT of app notes, you will be better off not separating the analog and digital ground planes in most cases. Instead, you should carefully separate the analog and digital sections via component placement, and carefully design your layout to control the path of ground return currents to minimize their effect on sensitive subsystems. The first couple of answers to this question have some more information, and there are a few other related questions that are probably worth looking at.

Answer 2

SOLVED!!

Now I am probably going to get some disagreement on this answer but understand this was tried and proven to work. Also this is for FLASH ADC, it may not be applicable for other ADC types.

So, I had the entire the circuit on a breadboard. I know breadboards are terrible and have super hi inductance etc. but I needed to prove the circuit before i ordered PCBs that don't work. I was using an 8 bit ADC (~20mV/bit resolution). Thats not super accurate, should be achievable on a breadboard.

The last 2-3 bits would not stop oscillating. That's over 60mV of noise. I tried everything to get rid of it:

• Filtering the analog signal a ton
• messing around the decoupling caps
• adding caps on the rails
• connecting AGND and DGND right at the ADC
• adding ground return wires for the ADC inputs

None of the those things made any difference whatsover.

What did fix it was AC coupling the ADC analog inputs (AIN, REF+, REF-) to DGND right at the pin connection with capacitors

See the illustration below. It was night and day difference, it worked perfectly. I double check everything to be sure that this was the fix.

My theory is that comparator inputs in the Flash are in reference to the noisy DGND. which means the input bias current is constantly fluctuating. So, you basically relying on the analog side to maintain a stable values with the load oscillating at speed, which is not a great scenario. This is especially hard when your using a breadboard with long return paths...

When AIN is AC coupled with DGND, as well as REF+ and REF-, the analog DC values get to ride on top of the noisy DGND so the Flash comparators will see a nice clean signal.