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So I've just finished up my first complete PCB board. The layout is 4-layer based, set up as ((1*2)*(15*16)) ---not sure if it should be ((1+2)*(15+16)) or ((1*2)+(15*16)) instead, please advise--- and uses a power- and ground-plane as layers 15 and 2, respectively. This was a layout that was recommended in a blog post from Autodesk EAGLE, so I figured that'd be the way to go --- however, it failed to mention the aforementioned syntactic setup --- on that note; should I specify the depths, or is this determined by the manufacturer? Furthermore it has all components atop, and only out of necessity I route signals through via's, as recommended.

I need help with the remaining problems; the ground and power planes do indeed show up and I've verified the connections where appropriate, so the polygons have poured copper in the correct places. Although, EAGLE still complains about air wires on every single power and ground connection --- these show up as direct errors, so how do I fix this?

With the respect to the wiring I'd also like to ask if my clearance is good enough. I had to lower the clearance distance to get signals out to pin headers among other things (see attached image). The default (and only used) net class has been set to a width of 10mil, drill of 20mil and clearance of 6mil.

enter image description here

Are there other things I need to consider or check? Please advise. I hope you have a lot of great feedback on this matter so I can patch this thing up and order my very first PCB :D

Hope to hear from you guys soon, and thanks in advance --- have a good one! :D

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  • \$\begingroup\$ In addition to the above, you should verify your with PCB manufacturer all of the other constraints, min trace width, min drill size, etc etc. \$\endgroup\$ – Tyler Sep 23 '18 at 18:35
  • \$\begingroup\$ I figured I'd use JCLPCB, and they list a clearance minimum of 5mil, so I hope 6mil is on the safe side (?), but I'm open to others if any a recommended. \$\endgroup\$ – Casper B. Hansen Sep 23 '18 at 19:08
  • \$\begingroup\$ Open your DRC and type in the tolerances provided by JLC. Then run the DRC again and it will report if you are ok. \$\endgroup\$ – Adil Malik Sep 23 '18 at 21:02
  • \$\begingroup\$ There are other things to consider other then just minimum trace width, hole to hole clearance, mask web, minimum edge clearance, etc etc etc \$\endgroup\$ – Tyler Sep 23 '18 at 22:38
  • \$\begingroup\$ @Tyler Of course, but I figure Eagle is probably set up by default to somewhat conservative settings, right? That's why I only concerned myself with the constraints I did change. \$\endgroup\$ – Casper B. Hansen Sep 24 '18 at 7:05
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I've finally figured out why Eagle isn't happy with me; the air wires are a complete brainfart — sorry! Obviously SMD component don't punch through to those layers, and thus have to be routed. Taking a break from things allows one to see such things a lot clearer, and I had been working tirelessly for two days straight — haha! :D

Any further comments and advice on finishing up the board is welcome! Thanks! :D

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You can give yourself a little more room by using 12 mil vias on 10 mil signals vs 20 mil.

You definitely need to correct the airwires; those are unconnected signals.

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  • \$\begingroup\$ Hi there! There are only 7 vias total, and they aren't really in the way, so this isn't a problem on this particular board. But I like the tip — thanks :) Sure, but how do I connect them? They do seem to be connected with the appropriate plates/polygons, so I don't see why Eagle interprets them as unconnected. \$\endgroup\$ – Casper B. Hansen Sep 24 '18 at 4:32
  • \$\begingroup\$ If you grab the device and move it a little, do you see a trace move with it? If not, then it is not connected. Create the Gerber files and look at them with the free viewer at viewplot.com, see if the traces are actually there. Often, there will be a trace overlaying the pad, with just a tiny bit airwire inside the diameter of the pad, those are a total pain in the butt to find. But on the gerbers, it will be fine and the connections will be made ok. That's safe to approve, or ignore. Can't really tell from what you posted where the airwires are. \$\endgroup\$ – CrossRoads Sep 24 '18 at 12:10
  • \$\begingroup\$ I've found the source of the errors; SMD components — blindingly obvious when I saw it :P \$\endgroup\$ – Casper B. Hansen Sep 24 '18 at 13:48
  • \$\begingroup\$ Yes, sometimes they just stick out. I change the unrouted color to yellow when the top & bottom colors are red & blue to make them easier to see. \$\endgroup\$ – CrossRoads Sep 24 '18 at 13:52

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