I have been working at driving some of those generic LED matrix panels found all over the web for sale (such as this one), 64x32
I've struggled a lot with the lack of real documentation, but I've managed to create a pretty decent image using an FPGA and binary code modulation. However, I've got a problem with vertical ghosting that I can't seem to fix.
In the image above, all of the dim pixels within the circled area are supposed to be off, but as you can see the ones in the first row are not. Because these LEDs are half off, they don't ghost into the 2nd row.
If I turn the LEDs in row 16 off, the half-lit LEDs on the top row turn off completely, suggesting that the 16th row was "bleeding" over into the first (row 16 being the last row in the top half). In the image below, notice how row 16 (circled) is itself dimly lit despite being written to zero:
I didn't want to post my verilog code in full as I was worried it'd make the post too long, but I'll happily provide it if it helps. Regardless, the basic process I'm following to draw each top/bottom row pair is:
- Clock out a row of data using RGB and CLOCK signals on panels
- Blank display by taking OE high
- Latch out the row data by taking LATCH/STB high
- Take LATCH low
- If we're on the final (5th) BCM iteration, increment current row (row address pins A,B,C,D) to set up for the next pair of rows
- Take OE low to enable display again
- Delay up to a value required for the current iteration of BCM output
- Double the delay value for the next pass and repeat until the row has been output 5 times (5bit BCM, 15bit colour)
I'd be really happy if somebody could enlighten me as to exactly what causes the ghosting in the first place, and how I might go about reducing/eliminating it.
I've tried slowing the process down, moving the row/address increment timing so that it occurs slightly earlier and before, but nothing seems to help.