store word assembly instruction in risc-v

Question

I'm really confused about the store instruction in risc-v. When I store word from register to memory, after the word is copied into the mem, does it sign-extended or zero-extended or perhaps something else occur? if it's extended, does the extension starts from the lower bits or the upper bits?

I tried to solve this exercise but i can't understand why the orange (0x3) is the right answer.

these are the steps I followed:

1. reg x11 gets the number 0x3f5 (0011 1111 0101 in binary) and is zero-extended to fill all the 32 bits
2. the number is copied from reg x11 into reg x5 and is zero extended again to fill 32 bits
3. i start counting bytes from the lsb so after 1 byte offset i'm pointing on 0xf and i load this byte

what is wrong with my solution?

thank you.

Answer 1

1. reg x11 gets the number 0x3f5 (0011 1111 0101 in binary) and is zero-extended to fill all the 32 bits

Yes.

2. the number is copied from reg x11 into reg x5 and is zero extended again to fill 32 bits

No. The contents of x11 are stored (as a 4-byte word) into the memory location pointed to by x5 (with zero offset). x5 itself is not modified in any way.

After this operation, memory starting at the byte address contained in x5 contains 0xF5 0x03 0x00 0x00 (little-endian storage)

3. i start counting bytes from the lsb so after 1 byte offset i'm pointing on 0xf and i load this byte

No. This instruction loads one byte from the memory location pointed to by x5, with an offset of 1 byte. Therefore, it transfers 0x03 (the second value in the list above) to register x12 (and zero-fills it to 32 bits).