i have a circuit for which i have simulated its output. But i can't seem to understand how it works. Here is the circuit..
simulate this circuit – Schematic created using CircuitLab
For analysis purpose, PWM source = 50% duty cycle with period of 20ms, and pulsed value of 2V. Vin = 10 Vdc Load = 1k L1 = 1H C1 = 1uF
Here is a snippet of waveform i got through simulation.
In above circuit,. I need to know the behavior of circuit. Like When Q1 is on what voltage appears at load and when switch is off then what happens??
I am stuck at;
1 - When Q1 is on, Vin appears at L1, and D1 will be open (reverse biased), so only path of current would be to C1 and Load through L1. But why doesn't any signal appear at load in this time?? why doesn't current flow from Vin to C1 or Load through L1??
2 - When Q1 is off, why does some voltage appear across Load, when there is no Vin because it is cutoff by Q1 switch?? and how does the current flow in C1+Load part, because there is only 1 wire connecting this part to L1 since D1 is open??