I'm working on Emulated version of a memory cell. It is a volatile single-bit memory.

Memory Cell

It uses 4 NAND gates to store one bit. I want to connect several of those memory cells together to create one byte of RAM.
Each NAND gate uses 2 transistors, so, in total - it uses 8 transistors. I'm facing a problem because of it. I have to reduce the number of transistors somehow. I tried to find out a solution and saw DRAM schematics. But I can't use capacitors in it. I want it to have only transistors and resistors.
Is it possible to reduce the amount of transistors required by replacing NAND gates or in some other way?

More details about the memory cell I'm using can be found here

  • 4
    \$\begingroup\$ Standard SRAM cell is 6 transistors. You can find the schematics online. \$\endgroup\$ – Lior Bilia Oct 1 '18 at 14:14
  • \$\begingroup\$ You don't really design SRAM cells with NAND gates. You design them with MOSFETS. See en.wikipedia.org/wiki/Static_random-access_memory \$\endgroup\$ – crj11 Oct 1 '18 at 20:58
  • \$\begingroup\$ Is it possible to use Bipolar Junction Transistors ( BJT ) in place of MOSFETS ? \$\endgroup\$ – user199977 Oct 2 '18 at 11:06

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy