# Best way to transform multiple digital signals from 12V to 3.3V

I am looking for the best way to transform multiple (more than 10) 12V digital signals down to 3.3V

I know some ways to do it, such as voltage dividers, make use of BJT or MOSFETs, or even Operational Amplifiers. However, such methods would require more than one component per signal, making the PCB more complex

Is there any simpler way to achieve this? Is there any commercial IC which manages the transform?

EDIT: The goal of this step down is simply to read such signals from a microcontroller (which LOW level is -0.3÷0.8V and HIGH level is 2.0÷3.45V). Hence, very small amount of current

• There are plenty of logic buffers which operate on 3.3V and will tolerate 5V inputs. Not so sure about 12V inputs though... Oct 1, 2018 at 20:31
• Such a question is only really answerable when the signal properties which must be preserved are stated. It's quite possible that two tiny surface mount resistors per signal will be sufficient, but that can only be determined when you fully state your requirement, including things like speed, source, possible overvoltage, and the input impedance of the low voltage device to be driven. Also please don't use inapplicable tags - you have a signal issue, not a power one. Oct 1, 2018 at 20:52
• Would you please give us a clue as to the maximum data rate you may use. Bytes per second would be a good scale to use. The ULNxxxx series is very slow, as they are meant to be relay/LED drivers, so anything faster than 10KB second may not work.
– user105652
Oct 1, 2018 at 22:47
• I would choose this 6 port CMOS non-inverting buffer from VccA to VccB which exceeds your requirements (SO16 only) st.com/content/ccc/resource/technical/document/datasheet/a6/35/… Oct 1, 2018 at 22:58
• @Tony I was thinking that some 4000 series chip would be useful, but never knew about the 4010. Looks like a perfect fit with VDD = 12V and VCC = 3.3V. The 2003 TI datasheet ( ti.com/general/docs/lit/… ) has better info on the internals of the chip. Oct 2, 2018 at 2:29

Figure 1. The ULN2003A can be driven by 12 V signals.

Note that the outputs are inverted and a pull-up resistor is required due to the open-collector output. Many programmable devices have programmable internal pull-up resistors saving external components.

Pay attention to Table 6.6 and the collector-emitter saturation voltage of around 1 to 1.6 V when low. This is a characteristic of the Darlington transistor arrangement.

• Are you certain the O.C. outputs will drop low enough for 3.3V logic to consider it a logic '0'? The OP could add a diode and pull-down resistor from each collector which as a pull-up to 3.3V.
– user105652
Oct 1, 2018 at 21:54
• No I'm not sure, hence my caution. We don't know what the OP is driving. Thanks for the cross-check. Oct 1, 2018 at 21:58
• Please, see OP edit Oct 1, 2018 at 22:40
• This Vce(sat) may not meet spec in question 0.8Vmax for Vin low = $V_{IL}= V_{ce(sat)}@I_{out}$ typ. but using Fig 1 in datasheet <60uA = 0.8V so pullup using Fig 1. so worst case 3V/60uA=50k min. pullup to 3.3V Oct 1, 2018 at 22:48
• There's plenty of pre-biased transistors that would do the job, possibly better. A few NPN duals in a SOT-70-6 package shouldn't be any bigger than the ULN2003A in TSSOP, and you'd have a wide choice of resistor combinations and transistor characteristics. Oct 1, 2018 at 22:56