Implement the function F(A,B,C,D,E) = A’B’C’DE’+ABCD’E using only the components required from the ones given below:
- One 3:8 decoder with active high outputs and an active high enable input
- One 8:3 Priority Encoder with input no. 7 at highest priority with one active high enable which if disabled forces the outputs to logic low
- One 2 input XOR gate
- One 2 input OR gate
- One 2 input AND gate
- I have noticed that the function has the minterms 2 and 29 - 00010 and 11101.
- I can make the decoder have four inputs using an enable pin (for a variable).
- Drawing the K-Map doesn't seem to simplify anything.
- Applying De-Morgan's law doesn't seem to simplify things.
- Tried using B,C and E in the decoder and A or D in the enable. This provides me with 8 minterms of B,C and E.
I am stuck on how to implement it using only these.
How do I approach this question(and other such design questions) further?