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I'm using TLV71333P-Q1 to regulate the input voltage of 5 V to get the output of 3.3 V.

It says in the datasheet that in normal operation, "The input voltage is greater than the nominal output voltage added to the dropout voltage" and when I looked up in the Electrical characteristics table there's a field of dropout voltage (VDO).

Electrical characteristics table

5V - 3.3V = 1.7 V is clearly greater than all of the above values but VDOs are different as the different of IOUT.

The question is how can I determine the IOUT of this regulator. And if my input voltage is lower than 5 V (may be 4 V or 4,5 V), how can I determine the VDO.

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IOUT is determined by the load of the LDO and is between 0 and 150 mA.

The minimum input voltage that should be provided is:

VIN = VOUT(nom) + VDO(max)

In your case: 3.3V + 0.54V = 3.84V

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Plot Vdo max / Iout ratio vs Vout. That is the effective series resistance or Ron at those limits.The spec graphs it and shows that Ron is 2.43 ohms at the lower voltage and 1.53 at the higher voltage. This is due to Vgs-Vt for the internal FET. Then you can analyze the worst case Vdo margin and power dissipation with your load R.

Then you can extrapolate or interpolate (NOMINAL) Ron at nearby Voltages. BUT USE WORST CASE FROM THE TABLES.

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