Since common DRAM chips support burst transfer and hardware page size (row size) in a bank is quite large, we can amortize the charging & activating time over bytes in a long burst transfer.

I think it has the same effect of bank interleaving, which distributes successive addresses over different banks. And the performance is the same.

So why we need bank interleaving indeed?

  • \$\begingroup\$ An awful lot of accesses do not need those bursts anyways. And even with them, slap interleaving on top and you double the bandwidth. \$\endgroup\$
    – PlasmaHH
    Oct 11, 2018 at 7:45
  • \$\begingroup\$ @PlasmaHH Yeah, but interleaving successive addresses has the same effect as the burst transfer. If those accesses don't need bursts, they cannot benefit from interleaving too. I don't think that's the point. \$\endgroup\$ Oct 11, 2018 at 9:27


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