I am designing a pure sine wave inverter and I am using IR2110 as a driver for the H-bridge. On Proteus however only IR2112 is available so i used it. I managed to get all the connections in a correct way with a good value for the bootstrap capacitor. However I am always getting a distorted signal with spikes on the output of the h-bridge(pic is below). I changed my spwm code and still the same. I am using pic16f877A with 32 values for the sine array.The generated spwm freq. is 16kHz. The clock frequency of the uC is 16MHZ. Any ideas why this could happen?full circuit

output of h-bridge


I think what you're seeing there is an aliasing effect between the PWM switching and the sampling rate of the scope. What it should look like is the red trace, still switching from the positive supply to the negative, with only the width changing from the modulation. The blue will be the smoothed voltage applied to the load. enter image description here

The IR2110/2 don't have any dead time insertion, so unless your SPWM algorithm is doing that with the complementary signal in code, it is going to cause you problems in real life with shoot-through. Either use a driver with a dead-time control, or one of the PICs with either the motor control PWM generators, or the CWG that can generate the appropriately timed signals.

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  • \$\begingroup\$ I am adding a zero to the end of my sine array to add the dead time is this enough? You can see the dead time in the signal form above also \$\endgroup\$ – hdrdiab Oct 12 '18 at 5:48
  • \$\begingroup\$ So long as your scheme is only switching one diagonal on at a time in each half cycle, and not using any complementary switching, it will be all that is needed. \$\endgroup\$ – Phil G Oct 12 '18 at 15:28

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