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I have been having trouble to understand how exactly the execute stage in risc-v processor for branch works. what I understood is that the ZERO output from ALU calculations for branch produces zero and through combinational logic affect the PC register (does it output zero? and if so, then how does the and gate in the picture below produces '1'?)

I would appreciate it if someone could explain to me how do the combinational path is calculated from the alu to the pc register when there's branch. that's the path I'm talking about: Just can't understand what signals should be produced...

enter image description here

thank you very much!

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    \$\begingroup\$ It's not clear what your question is? The path from the ALU to the PC is marked in that diagram. Since RISC-V is an instruction set architecture, not a processor architecture, that diagram is just one example of many possible. It would help us help you if you would give us a URL to the text which that diagram comes from. \$\endgroup\$
    – TimWescott
    Oct 12, 2018 at 14:49
  • \$\begingroup\$ I believe there is an error in the diagram you cite - it suggests that the control systems check the zero output of the ALU, but the instruction described is a "branch if less than" operation, so logically they should be checking the negative result output. \$\endgroup\$
    – Jules
    Oct 12, 2018 at 16:45

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