I'm trying to make something with ADI PLL (ADF4159 and ADF5901). In their datasheet there is nothing about how to source the clock pin. I have found lots of information about clocks on the internet from TI and NXP about Matching & Termination, and Distribution.

In the evaluation board guide from ADI, I found something weird: a T-shaped RC filter consisting of two 1nF caps and one 12R resistor (edit: sorry this value is misinterpretation and the value is undefined). I think this is a high pass (maybe notch DC remover) filter before each IC as you can see in teh first image.

Here is the filter response (top right is filter response and bot. left is input sig.): Filter response

Now looking at the evaluation board's filter, you can see each filter just before each IC:

top layer

Is that some kind of weird termination? (Why? How?) I have never seen this kind of termination before.

It's also nice to look at the clock source (100MHz): clock source circuit

What is that 91 Ohm resistor? Or the 0 Ohm?

(ADI did not explain strictly how to connect RF feedback to the ADF4159 in a single- or double-ended arrangement or powering guideline).

I have two mysteries:

  1. HPF
  2. 91 Ohm resistor & that 0 Ohm resistor


I have found something in the datasheet saying that AC decoupling is really recommended:


Now the questions are updated:

  1. Is it really AC coupling? I though that AC coupling is only one big capacitor. Why is there a T-section with a lossy noisy resistor?
  2. Does that resistor terminate the trace?
  3. What about 91 Ohm resistor, it must reduce clock power. then shunt resistor can still be power controller? And what about 0 Ohm one?
  4. What does -5dBm to +9dBm signal exactly mean?

Edit 2

In reference design, they told: they're using CWX113-100M oscillator, but I can find this part in the net to become ensure about clock output power. I have looked at some oscillator data sheet and I found they can power from 18.2 dBm to 21.1 dBm and it is higher than +9 dBm requirement of the clock input mentioned above.

  1. Really there is no recommendation to introduce kinds of AC-decoupling and power control and termination altogether? or at lest AC-coupling for RF? I have found differential decoupling from TI but not the single ended. :(

  2. And exactly why they have used T-section instead of Pi-section?

Edit 3

I've proceeded deeper, I will show this IC, ADF4159/ADF4158, PLL in three evaluation board:

First is what you have seen and called UG-866, there were two capacitor plus one shunt resistor + one series 91 Ohm resistor , I looked at bill of material and in "series resistor" description they've told: Do not insert!, and in its real board this shunt resistor is missed:


The second is UG-383 and you can see the shunt resistor is missing again: ug383

The third case is UG-123 and in this case series resistor become 0 and shunt resistor is defined to be 51 Ohm although this shunt is missing in board but they told you can add this resistor for expansion! (What the hell is that expansion?) : enter image description here

I can't post these filters simulation because link more than 8 require at least 10 reputation.

In first and second case we have rise and fall edge in frequency response like bandpass filter (I also considered capacitive load mentioned in datasheet), decrease the series resistor will push rising edge while reducing its ceil amplitude

In case three by reduce the series resistance to 0 the ceil(peak) smaller and I think it's rising and falling edge are like two other cases (or it's not prominent), But only with higher attenuation, which is not expected!!!! because series resistance is removed, Oh my god! I need strong and rigid explanation about this T section. 100 Ohm shunt in 1st and 2nd case will halve the peak but in third case will make it 0.1, then 51 Ohm will actually kill it to 0.05

Edit 4

transient analysis shows that, removing shunt resistance will reduce the transient dramatically or settling time.

  • \$\begingroup\$ Do you know the Ohms Law for Jitter? Tj = Vnoise / SlewRate. \$\endgroup\$ Oct 14, 2018 at 3:32
  • 1
    \$\begingroup\$ @analogsystemsrf I wasn't aware of it but how it can help? It means increasing the slew rate will improve jitter. \$\endgroup\$ Oct 14, 2018 at 10:45

1 Answer 1


I Answer your question in the same order you asked

  1. Yes it's AC coupling. Almost all PLL's have they own DC biased so it's not rare to see an AC coupling caps there. If you ask why there is a resistor. the answer is pretty easy. but first I need to answer your third question and then I return to that.

  2. Sometimes it's the case and sometimes not. If the resistor is 50Ohm yes but if not the answer is in following

  3. "-5dBm to +9dBm" is the strength of Reference Signal.

So the thing is in some cases the reference clock output strength is not in the required range (like crystal oscillators, see SIT8103 as an example) and you might want to degrade the power by means of adding a parallel resistor to keep the REFIn power in range. So the resistor is there to degrade REFIN power if it's powerful.

Additionally note that a resistor noise is not degrade the system performance because if it's in use it already mean that REFIN signal is too powerful. Also please note that in PLL, the jitter is what's matter the most not signal noises although the affect each vice versa.

  • \$\begingroup\$ Why 50 Ohm? since neither source nor load are not 50 Ohm, one is low imp. & other one is High imp. Then why 50!?!? \$\endgroup\$ Oct 15, 2018 at 14:16
  • \$\begingroup\$ I'm sorry that I missed something in updated questions. can you check them again? because I updated them again. \$\endgroup\$ Oct 15, 2018 at 14:17
  • \$\begingroup\$ I understand there is no need to reading, I though I told in wrong way, sorry. you told if the resistor is 50 Ohm, probably it could be terminator, but I asked why? This is totally.And I challenged that 91 Ohm resistor in series, by updated questions. \$\endgroup\$ Oct 15, 2018 at 14:45

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