I have a question about TVS diode selection. This kind of question is already discussed in previous questions.

ESD Diode - GPIO Microcontroller

Selecting a TVS for ESD protection

For protecting vcc line of a controller with nominal VCC = 5V, 5%, maximum vcc = 6V. We normally choose esd diode with Vrwm=5V, for them Vbr = 5.8 to 7.8 and Vc = 12.5 to 15V (ESD9B5.0ST5G as a reference).

ESD diode manufacturer graphs also shows even though device is choosen from 5V operation, During testing, voltage across clamped can go up to ~50V(not sure can be lower but way higher than 5V), after some time they comes back to actual Vclamp voltage.

Is this ~50V clamping voltage is lethal to IC's(5V VCC pin)?

few answers i got it were first portion of ESD pulse where 8kV reaches is very low energy (few ns) and can't make much harm to IC's. In addition to that most of the IC's have basic ESD protection (have esd protection diodes on all pins which will induct during high voltage events, designer's work is to limit the current passed to those diodes during transient event)

once this this high peak passed, higher pulse width portion comes which needs to be swallowed by esd diode. enter image description here

we can't add series resisters in VCC pin of the IC, because it drops the voltage for the IC.


So, in those cases just connecting ESD diode across VCC line is worth?


  • \$\begingroup\$ @Bimpelrekkie : Thanks for the answer.I agree with you on decoupling capacitors. I see for these esd events currents mentioned were ~30A (in waveforms), i can feel they are low energy events, but is there a way to say quantitatively (or by calculations) that these low energy events won't make harm (mentioned they can cause currents up to 30A) \$\endgroup\$ – user19579 Oct 18 '18 at 8:46
  • \$\begingroup\$ @stefen: Thanks.the diode placements w.r.t to protected IC has effect due to extra inductance of the path. But current designs mostly have planes, which have very low inductances. I am not sure how will that effect the scenario. \$\endgroup\$ – user19579 Oct 18 '18 at 8:48

I think no one will be able to tell you if this 50V clamping voltage left over from the ESD diode is lethal to your IC's 5V VCC pin. It depends heavily on the duration (=energy) that reaches the pin and of course on the IC itself. You might have to test that with an ESD test setup.

But there's another thing to consider:

The diode should be placed in-between the ESD source and the IC and it should be spaced from the IC. If the diode is just a few millimeters away from the IC's VCC pin, then this trace distance acts like an inductor and thus the remaining 50V (very short) pulse will be filtered out by this trace inductance and the ESD diode will be able to absorb all energy of the pulse (together with the VCC supply capacitors).


Normally you don't need ESD protection on the supplies (VCC) of a chip!

Reason: there should be decoupling capacitors between VCC and GND. Those capacitors will "eat" the ESD pulse, I mean, an ESD pulse does not have enough energy to significantly charge the supply decoupling capacitors.

Also: all ICs have build-in supply clamps as part of their ESD protection, these clamps are capable of handling the current from ESD events. ICs need these clamps as a positive ESD pulse on any input will be routed to the supply (VCC) rail by the ESD diodes in the chip. Without that clamp the VCC could increase too much (if there are no decoupling capacitors connected, for example when the IC isn't soldered on a PCB yet) and damage the IC. To prevent damage, the supply clamp(s) (most ICs have several) short the supply in an ESD event. How I know this: I have designed the on-chip ESD protection of some ICs.

So in my opinion: there is no need for VCC ESD diodes assuming you already have supply decoupling capacitors. If you don't have supply decoupling capacitors then please explain why you don't have them.


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