That is not the schematic from the datasheet. The datasheet you linked is the user guide for the LM3409HVEVAL/NOPB-ND eval board.
D2 and R5 are not in any of the datasheet schematics.
You can safely leave them out.
The schematic you show is from the LM3409HV Eval board which has a circuit to demonstrate external parallel FET shunt for high frequency PWM dimming.
I believe D2 and R5 may have been related to the external PWM dimming circuit.
The LM3409 Eval board, PN: LM3409EVAL/NOPB-ND does not have the external PWM nor R5 or D2 footprints.
R5, if used, is the same as R1 and R2 as it says used to "slow down the rising edge of the FETs slightly to prevent the gate from ringing".
The zener foot print is on the PCB in the rare case you need to clamp voltage spikes.
My guess is that when TI designed the HV eval PCB they used a different MOSFET than what is now in the user guide BOM. This MOSFET change eliminated the need for D2 and R5 and the fix was to change R5 to a 0 Ω resistor. This is why these two components are not mentioned in the user guide.
With modern MOSFETs the switching speeds increase every year. The
severity of the turn-off snap recovery is a function of the MOSFET
switching speed. A MOSFET turn-on is what caused the diode to turn off
in the first place. So, a simple solution is to slow the MOSFET down.
Yes, why use fast MOSFETs. Well, we just want to slow down the MOSFET
Source: Synertronic Designs thanks to @efox29