I use LTC6994-2 to delay and invert input signal. I want 2s delay between input and inverted output.

Schematic diagram from LTspice

However, this is what I get on the output:

output plot

Green waveform is input waveform. Output (Blue waveform) is expected to be inverted and delayed version of input signal. However, in my circuit, output goes high at the start and stays that way no matter how input changes.

Datasheet of the component:

Figure 6 on pg14 is what I am trying to accomplish.

I followed steps on page 16 in datasheets to select values of resistors:

Ndiv selection:
tdelay/16u <= Ndiv <= tdelay/1u (equation 1) => 125K<=Ndiv<=2M
Selected lowest Ndiv to reduce power consumption => Ndiv = 262,144

I selected corresponding R11/R12 resistors as suggested in datasheet:

Table 1 DIVCODE programming from LTC6994 datasheet

I selected Rset from equation given in Step 3 on pg 16 (equation 2):
tdelay = (Ndiv * Rset/50K)*1u
Taking 2s delay and 262,144 Ndiv, Rset = 381.5K

Is there anything that I am doing blatantly wrong here?

  • \$\begingroup\$ Please edit your question to explain what you got. The plot is illegible in normal resolution so a caption below it explaining its significance would be useful. \$\endgroup\$ – Transistor Oct 20 '18 at 14:07
  • \$\begingroup\$ A link to the datasheet would be nice too, since I don't know what an LTC6994-2 is supposed to do. \$\endgroup\$ – brhans Oct 20 '18 at 14:25
  • \$\begingroup\$ Edited. I hope it is a bit clearer now. \$\endgroup\$ – DenR Oct 20 '18 at 15:08

That is the correct functionality, per page 14 of the datasheet:

If the input doesn’t remain high or low long enough for OUT to follow, the timing will restart on the next transition. Also unlike the LTC6994-1, the output pulse width can never be less than tDELAY. Therefore, the LTC6994-2 can generate pulses with a defined minimum width.

Because the delay timer is reset on each edge transition, the LTC6994-2 is also operating as a pulse discriminator. For a valid pulse to be transmitted, the minimum pulse width must be at least 1 tdelay.

enter image description here

|improve this answer|||||
  • 1
    \$\begingroup\$ Yes, that is it. Won't work for my circuit, but at least I see how it works in general. Thanks. \$\endgroup\$ – DenR Oct 20 '18 at 19:29
  • \$\begingroup\$ @DenR If this is the answer you were looking for, be sure to select it (voting is optional, but it's a sign that says a thousand words, one of them is also "thank you"): below the voting there's a "check"-like button. This way, others with your problem, or similar, in the future, can see it, as well. \$\endgroup\$ – a concerned citizen Oct 21 '18 at 6:41

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for?Browse other questions tagged or ask your own question.