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I've been trying to learn how to use logic gates. I wanted to use logic gate to bump digital signal from 3.3V MCU to a 5V. I took a T74LS38D1 and mocked the solution using two switches connected to 3.3v and GND instead an actual MCU. I also connected a multimeter to check the voltage between GND and the output of the gate.

I was surprised to see that the voltage for both input set to low was something around 1.2 to 1.4V. It was supposed to be a high state so I expected close to 5V.

When I set both inputs to GND the voltage on gate output was around 0.15V which is what I expected.

Why is the voltage of high gate output so low? Am I missing something obvious?

schematic

simulate this circuit – Schematic created using CircuitLab

  • I also used a different NAND gate chip, SN74LS38N and same thing happened. So this hints that my understanding is wrong.
  • I have grounded any unused input pins on NAND logic gate chip.
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You description of voltage measurement and state of inputs is completely unclear, but I suppose the main problem is that the ICs you are using have open collector outputs. It is (maybe) intended given you want to shift voltage level, but in any case you need pull-up resistor at the output to make such gate to work.

But there is not much point in using an open collector output for level-shifting purposes when you are powering the IC from 5V anyway. And in lot of situations (depending on your particular use-case) the push-pull output will perform much better than pull-up resistor.

If you want to shift voltage from 3.3 V to 5 V using the logic gate, go for the standard push-pull output, power the gate with 5V supply and check if the input levels match IO output voltage of your MCU (TTL-compatible versions of logic gate are better in terms of guaranteed high level voltage range for such purposes).

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The 74LS38 has open-collector outputs - the collector of the output transistor is only connected to the output pin, and not to anything in the chip. The output transistor can either pull the output to Ground, or "let go" of the output.

You have to provide something outside the chip to pull the output High - a 5K1 or so resistor to +5 Volts would work - then you should see the output go very close to +5V when both either or both inputs are Low.

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Martin's answer has the right idea, but he was not explicit in how to deal with the problem.

Change your NAND output to look like this

schematic

simulate this circuit – Schematic created using CircuitLab

See if that doesn't help.

An open-collector output essentially looks like a switch to ground. It has no ability to pull a high output physically high, and what you were seeing was a result of leakage currents.

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