I am using a P Mosfet in the schematic, pin 1, 2, 5, 6 are all connected together. How is this done in altium?
The easiest (and probably the most common) way of doing this is placing multiple pins on top of one another in the schematic. If you ensure all of the electrical "hotspots" are lined up with one another on the grid, they will automatically be "read" as connected to each other. Then, if you want to show all of the pin numbers (like what is shown in your image) you can adjust the pin number margins to separate them from one another. For example Pin 1 will have a margin of 10 DXP units, Pin 2 will have a margin of 20 DXP units, Pin 3 will have a margin of 30 DXP units, and Pin 4 will have a margin of 40 DXP units. They will show up in the schematic just like your image.
This is long-requested feature, it has a history on Altium's bug/feature tracker that goes back to 2011. It is currently listed as 'in development'. If you have an Altium Live account you can view the feature request here: https://bugcrunch.live.altium.com/#Bug/317
Another workaround is to assign the same identifier to multiple pads in the PCB footprint, which will cause them all to be connected to the corresponding schematic pin. However this requires customizing the footprint to suit the pin layout of the component. This is not such a big deal in things like SO8 MOSFETS which have a conventional pinout, but would be a pain for ICs that use ganged pins but an otherwise standard package.
Instead of assigning the same identifier to multiple pads in the PCB footprint you also can assign the same JumperID to pads that connected together. But as you can see this is almost the same because for each type of pattern with connected pins you must have separate copy of "pad record" in library. In the early days of Altium Designer there was another option. Every schematic library element can have pin map for each connected model. As footprint is a model you can have a mapping table. Mapping was designed not only one to one, but also one to list. I mean one pin from schematic library's element to list of pins from pattern. (https://designspark.zendesk.com/hc/en-us/community/posts/115000098289-Multiple-PCB-Pin-for-a-single-Schematic-Pin). This feature was slightly more powerful then dumb patterns with connected pins as this mapping table is not the part of pattern. But still twice messy: this table must not be the part of logic element (i.e. element of schematic library) instead it must be the part of component; pin numbers seeng on shematics never show mapped pattern's pin numbers, so nobody know did you done any remap or don't. For now this type of logic-pattern connections is not supported by Altium though mapping tables for each shematic library element still presents. So, of cource, AD cannot be "industry standard" at list at component's library design.