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The schematic below is an H-bridge , the high and low mosfets are internal to the two ICs on the right side, their datasheet is here. What is the purpose of the part on the left, which I googled to be a buffer IC, datasheet here. Is it for the sake of circuit protection? My understanding of using a buffer is limited, I have always assumed they where used in cases where something could not source enough current to drive something else, so you use a buffer with higher current sourcing capability. Is this correct and is this the case here? H_bridge

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It is a buffer and used because the drive source current at hdr P3 is not known. This buffer has almost no load on its inputs but can source +/- 8 mA per pin, even though the package has a wattage limit, depending on if you get a SOIC package or a DIP package. Maximum total current is limited to 50 mA.

That is more than enough to drive the H-bridge drivers. Speed limit for U1 is about 20 MHZ though 50 MHZ is possible with just 15 pF loads. Plenty fast for PWM if you are using that.

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    \$\begingroup\$ I thought I saw \$I_\text{OH}=-8\:\text{mA}\$ and \$I_\text{OL}=8\:\text{mA}\$ when \$V_\text{CC}=5\:\text{V}\$. Where'd you see the "24" figure, exactly? By the way, that H-bridge input specs are way down the sheet at 4.4.6 and require only microamps. Nowhere near the drive compliance of the AHC244. But I agree that since we don't know what's at the header... it's a safe way to be. (Though those \$1\:\text{k}\Omega\$ pull-downs on the inputs of the AHC244 are pretty heavy loads already, so perhaps I'm not sure what's gained.) \$\endgroup\$ – jonk Oct 26 '18 at 3:21
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    \$\begingroup\$ @jonk. My bad. I corrected my answer. I had the standard 74HCxx series in mind. \$\endgroup\$ – Sparky256 Oct 26 '18 at 3:48

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