I don't have familiarity with FPGAs and I haven't used VHDL for 21 years, so starting from scratch.
I am wondering if the following is possible/sensible.
- FPGA running n "small" independent microcontroller cores, e.g. 8-bit AVR
- each core has access to it's own CAN controller block
- each core has access to two I/O signals
- each core executes from external flash (divided up? shared? not sure...)
- each core has it's own JTAG interface.
- all cores share the same reset and clock inputs
I notice that on opencores.org there are some AVR implementations, but I am unsure how to work out how many I could squeeze onto a single FPGA.
The aim here is to create a compact setup for testing the same firmware running on many CAN nodes at the same time. Currently we connect together lots of off-the-shelf eval boards.