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I tried to make a simple NPN transistor inverter so that I can use the strobe line of the parallel port to store data in two separate flip-flop IC's. (74HC174 and 74HC574) The IC that data will be stored in is based on whether the strobe is on the falling edge or the rising edge.

I connected everything including this circuit and there is no smoke, no heat or anything. I could assume my resistor choices are terrible, but I'm not sure, especially with how many changes there are to PC port designs.

For reference, the parallel port I'm using is coming from a dell laptop and I specifically disabled ACPI.

When I tested the particular circuit shown, The voltages I get from the NPN base are 0.09 and 0.69V. However, the NPN collector voltages are acceptable (0.0 something, and 4.9 something).

What would cause the NPN base voltage to be so low in both cases and how do I fix it?

inverter

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The transistor base is not an output of this circuit.

It is where the input signal connects to the transistor. There is not expected to be any gain between the input and this node.

If you want a non-inverted output with gain, you can add another CE stage.

Or if you want both inverting and non-inverting outputs with equal amplitudes from a single circuit, you could add an inverting buffer circuit (perhaps based on an op-amp).

Or if you want inverting and non-inverting outputs with equal amplitude and equal phase delay, you will need to go to a fully differential amplifier circuit, like the emitter-coupled pair. Or just buy a fully differential op-amp.

Or if you just want a non-inverted replica of the input signal to drive another high-input-impedance circuit, you should just connect to LPT_STROBE rather than to NORMAL. If you want to connect more than 2 or 3 of these same circuits to a single CMOS output, you'll probably want to increase the value of the input resistor to something more than 1 kohm, though.

Note: As Bimplerekkie points out in comments, you could have much higher fan-out if you used an n-channel MOSFET in place of the BJT in your circuit.

Or just buy a CMOS buffer and inverter chips. One-gate versions are typically less than $0.10 in reasonable volumes, so buying the one-chip solution is usually cheaper than what you pay to place all the extra resistors in a discrete inverter circuit.

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  • \$\begingroup\$ Another alternative is to replace the NPN with an NMOS (for example a 2N7000) then the signal marked NORMAL will be (almost) the same as the input signal, it will not be limited to about 0.7 V. \$\endgroup\$ – Bimpelrekkie Oct 27 '18 at 15:39
  • \$\begingroup\$ @Bimpelrekkie, true, but even with the current design a reasonable CMOS output should be able to fan-out to 2 or 3 of these circuits, you just have to fan out from LPT_STROBE rather than NORMAL. \$\endgroup\$ – The Photon Oct 27 '18 at 15:40
  • \$\begingroup\$ I agree, using circuits like this even with an NMOS like I suggested (as a quick-fix) is asking for issues. CMOS inverters cost almost nothing so there is no reason not to invert the signal properly by using a proper CMOS inverter. \$\endgroup\$ – Bimpelrekkie Oct 27 '18 at 15:52
  • \$\begingroup\$ Ok, I might get hope from increasing the 1K resistor. I managed to hack the board to connect the flip-flop clock input directly to the LPT strobe and now the maximum voltage is 1.5V \$\endgroup\$ – Mike Oct 27 '18 at 16:27
  • \$\begingroup\$ @Mike, changing the resistor won't change (much) the voltage at NORMAL. What's the source of the signal at LPT_STROBE? Sounds like Bimpel and Spehro's suggestion to swap the BJT for a MOSFET might be your best solution. \$\endgroup\$ – The Photon Oct 27 '18 at 16:29
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The 0.69V is caused by the base loading (it's effectively a forward biased diode) and that is exactly to be expected.

There is no way to "fix it" with a BJT in that position and output drawn from the base, it's doing what is expected. You can, however, substitute a different part or hack the PCB to draw the output from the input.

The 2N7000 suggested by @Bimpelrekkie (assuming a TO-92 package as well as the 2N3904) has a compatible pinout so you can just mount it instead.

2N3904: E-B-C

2N7000: S-G-D

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The maximum voltage across the base-emitter junction of an NPN trasistor is about 0.7 volts.

You could use the LPT_strobe signal (before the 1K base resistor) as your "normal" signal.

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  • \$\begingroup\$ I already wired this up on a PCB. Is there another alternative? \$\endgroup\$ – Mike Oct 27 '18 at 15:45
  • \$\begingroup\$ Yes: use an NMOS instead of the NPN, but next time: don't rely on circuits like this but instead use a proper CMOS inverter chip. \$\endgroup\$ – Bimpelrekkie Oct 27 '18 at 15:54
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Ok, I figured it out. The #1 problem was that the resistor was connected between NPN base and VCC.

All I really needed was resistance from input to base and the NPN collector resistor just like how Q2 is setup in the schematic below with the two resistors connected to it.

Circuit

schematic source: http://www.dinceraydin.com/8051/index.html

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