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I am designing a circuit to power a brushed DC motor. The motor will be given 24VDC, modulated with PWM. I would like to have an analog voltage sense capability for use with my Atmel ATmega328P @ 3.3 AVCC, with some room on top for a safety margin. This means I want both a voltage divider and a voltage averager (an RC filter).

As I have discovered (by reading Wikipedia), a filter is really a frequency-dependent voltage divider. If I know the frequency I will be using, I can design an RC lowpass filter—but instead of designing for 3 dB attenuation at \$f_c\$, I can design it for 10 dB attenuation at \$f_{PWM}\$. This is similar to this question, but I don't think I need R2, do I? See attached circuit diagram.

I calculated these values with the equation (from Wikipedia, again)

$$\frac{V_{out}(\omega)}{V_{in}(\omega)} = \frac{1}{ \sqrt{1+(\omega RC)^2} }$$

where

$$\frac{V_{out}(\omega)}{V_{in}(\omega)} = 0.1, ~~~ \omega = 2\pi 15625 = 98175 \text{ rad/s}$$

My questions:

  1. Is this necessary at all? My idea here is that the voltage across the motor will not be exactly the voltage I expect based on the PWM, due to varying loads and back-emf, etc, so I need to measure voltage to use in closed-circuit feedback. Is this incorrect?

  2. Am I going about this at all the correct way? Circuit design, value selection, etc?

  3. Obviously this would be Very Bad for the ADC at 100% duty cycle, as there would only be the 24V DC component and the voltage is not divided. The max I am planning on is 60% or so. Is this likely to cause issues?

  4. What advantages, if any, does Jeremiah Rose's circuit provide over this one, if the frequency is known and fixed? Besides the ADC protection at 100% duty cycle.

schematic

simulate this circuit – Schematic created using CircuitLab

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    \$\begingroup\$ If you want it to range from 0 to 3.3V at the output, you'll want a resistor in parallel with C1 -- ask yourself what happens at 100% duty cycle. \$\endgroup\$ – TimWescott Oct 30 '18 at 20:46
  • \$\begingroup\$ Yes, I have asked myself that... see my Question 3. Is that going to be relevant across the entire range of duty cycles, though, or only when the duty cycle is near/at 100%? \$\endgroup\$ – randomhead Oct 30 '18 at 20:49
  • \$\begingroup\$ Since PWM voltage does not change, just the pulse width, you need to pay attention to average motor current and RPM's. \$\endgroup\$ – Sparky256 Oct 30 '18 at 22:39
  • \$\begingroup\$ @randomhead: if you're planning on going up to 60% duty cycle, make it safe at 100% duty cycle -- you'll only lose one bit of precision, and things will still work in the extreme. If you just can't bear to do that, then use some sort of limiter. \$\endgroup\$ – TimWescott Oct 30 '18 at 23:23
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    \$\begingroup\$ @sstobbe — yeah, I was afraid of that. Embarrassingly, I remembered after asking this question that I have been educated in the use of PSPICE and such... I'm going with TimWescott's (and Jeremiah Rose's) suggestion to add R2 in parallel with the capacitor. With R1 = 101kΩ, R2 = 909kΩ, and C = 0.22µF, I get a relatively long rise time (~50ms) but very low ripple (<2mV), which seems acceptable for this application. \$\endgroup\$ – randomhead Oct 31 '18 at 3:03
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Trying to answer my own questions:

  1. I haven't found out if this is necessary at all yet.

  2. Apparently I was not going about it the right way. The filter I designed attenuates the 15kHz portion of the voltage by 10 dB, but it does not attenuate the DC component and so the voltage at the ADC input is much larger than is permitted. As far as the DC component is concerned, this is only an averager, not a divider.

  3. See 2.

  4. The advantage to the circuit posted in the question I linked is: it actually does what I want it to.

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