# How do we decide which circuit is a latch?

1. Will A and B always be the complement of one another regardless of what logic gates we use in the latch-like circuit? For instance (the two circuits shown as examples):

2. How do we decide whether A and B will be the complement of one another or not?

3. How to find the invalid states?

4. Are these two latches? simulate this circuit – Schematic created using CircuitLab

OR simulate this circuit

I have tried following a few videos for instance this. But the presenter says that a certain state is invalid because Q and Q' should be the complement of each other. But how do we decide/prove that Q and Q' are the complement of one another?

UPDATE:

Truth Table of First Circuit: How do I derive answers to the above questions from here.

• the video that you linked show you exactly how to prove which state is invalid in the first 5 minutes of the video ..... which part of the video was unclear to you? Oct 31, 2018 at 17:29
• @jsotola He says (1,1) state is invalid because in that case both Q=0 and Q'=0. He did not mention why Q and Q' should be the complement of one another. Oct 31, 2018 at 17:38
• no! not what he says! ..... what he does. ... do the same, draw a logic diagram for each of your circuits. .... please add the logic diagrams that you have produced to your question Oct 31, 2018 at 17:47
• @Soumee, i just noticed that you are not the OP. ..... Q' means not Q, which is a complement of Q ...... you do not need to have a Q' as an output, but you will most likely need it internally Oct 31, 2018 at 17:55
• @jsotola I have added the truth table.....Can you help me answer the above questions.... Nov 1, 2018 at 8:52

To have a valid latch there must be three distinct values of the inputs:

1. One set of input values that forces the latch to a logic 1 state

2. One set of input values that forces the latch to a logic 0 state

3. One set of input values that holds the current state, whether it is 0 or 1

A valid latch circuit must also have an output signal, typically called Q, that reflects the stored state of the latch.

Set up the truth tables for each circuit and see if you can find the necessary input conditions for the circuit to be a latch.

• If I draw the truth table, how will I watch out for the invalid states? Oct 31, 2018 at 17:44
• How would I know which state is invalid? Oct 31, 2018 at 17:44
• @Soumee, do not ask those questions until after you draw the truth table Oct 31, 2018 at 17:56