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Recently I've taken over a project which requires low noise but the design given to myself does not meet the requirements. I noticed on the PCB design It has a single Power Plane with 2 separate voltages (+5v & -5V).

Should I seperate these power sections into 2 separate planes to reduce potential for noise between the 2 voltage section in the single plane?

Single Power Plane - 2 Voltages

From my research it seems bad for noise to have a ground plane to have 2 separate sections (Analogue & Digital GND) as there can be voltage difference between the sections. People recommend connecting these sections together to reduce these noise issues. Obviously in this circumstance you can't connect these 2 sections, so that's why I thought separate planes might help.

Any and all help will be greatly appreciated. Thank you in advance!

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  • \$\begingroup\$ Which requirements are you talking about? \$\endgroup\$
    – Anonymous
    Nov 1, 2018 at 14:04
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    \$\begingroup\$ Are you driving a motor? Are you attempting to measure 1uV strain-gauge changes, at 1,000 Revolution Per Second axles rotation, to control torque? \$\endgroup\$ Nov 1, 2018 at 14:11
  • \$\begingroup\$ Requirement are just to have as low noise as possible. As it uses low noise amps. It appears the noise level is greater than the expected so I'm trying to improve upon the design and reduce any possible source of noise. I believe this is possibly a source of noise since there is a potential difference between the 2 planes. \$\endgroup\$
    – SgtSafety
    Nov 1, 2018 at 15:09
  • \$\begingroup\$ You can connect the two sections as far as AC currents are concerned. Just use a capacitor. Not that I would say you want to do that without knowing a lot more about your design. \$\endgroup\$
    – The Photon
    Nov 1, 2018 at 15:21
  • \$\begingroup\$ That is half my challenge, they haven't told me exact design requirement and won't get me the information. Was hoping this might be a simple design rule where you wouldn't put two different voltages on a single plane. I'll just have to keep researching. \$\endgroup\$
    – SgtSafety
    Nov 1, 2018 at 15:42

2 Answers 2

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Yes and No.

The problem with separate ground plane, it can become very complex to understand the current flow, and most of the time it is better to have a single ground plane.

Separate plane can be useful if you have filtering of the power and a lot of digital going on, but a lot of care needs to be taken.

The planes shall connect underneath the IC that has analog / digital, and you shouldn't have any trace going between the plane, at any layer. If you need trace going through from analog to digital plane, they should be above (or below) the connection between the two ground planes.

enter image description here

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  • \$\begingroup\$ Hi, Thanks for replying. I might be reading your reply completely wrong but I was discussing having separate power planes (+5V and -5V) as my the current design has that on a single power plane with a gap between both. Again sorry if I've misunderstood your reply. \$\endgroup\$
    – SgtSafety
    Nov 1, 2018 at 14:37
  • \$\begingroup\$ Can you add on the screenshot which plane is what ? is there a ground plane on other layers? \$\endgroup\$
    – Damien
    Nov 2, 2018 at 11:45
  • \$\begingroup\$ The centre plane of the image is -5V & the outside is +5V. \$\endgroup\$
    – SgtSafety
    Nov 5, 2018 at 8:59
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Problem

Whether this is a problem depends on your application, and what currents are flowing through this plane; the currents might be supply currents or they may be return paths for signals on an adjacent layer.

If high-frequency supply currents are flowing from one end to the other of the C-shaped fill, this could work as an antenna. Also, note that the line of vias on the left is dividing that fill; you may need to track the alternate paths. In principal, you want these current paths to be as short as possible.

Another major issue is where high-speed signals on an adjacent layer cross over the split. This layer is marked "POW 3", so I'll assume your stackup is Signal-Ground-Power-Signal; usually, thickest dielectric layer is in the middle, so that the outer (signal) layers will couple to the "AC ground" (grouping DC power and ground) layers.

A circuit is always round-trip, and even high speed signals need a return path. Signal edges induce an opposite (return) current in adjacent layers; when a high speed signal crosses a split like this, the return current has to find another path around or across the split. For example, if a high speed signal (adjacent to power plane) runs vertically from the lower right corner to the upper right corner, then its return current may have to take the long way around the C-shaped fill. Note that even without a split plane, this can also happen when a high speed signal changes layers, e.g. from top to bottom; the return current has to find a path from one adjacent layer to another.

Solution

So our goal is to shorten the paths for high-frequency currents, making these paths poorer antennas. The obvious way to accomplish this is to move the related components closer together and create direct paths between them; but moving parts and power planes/fills is not your only option.

Another tool is bypass capacitance. A capacitor's complex impedance is \$\frac{1}{j\omega C}\$ , so at high frequencies the impedance approaches zero: use this to create AC shortcuts from one DC level to another. Focus on finding long paths for the above currents (supply and return), then place a bypass cap to create a shorter AC path across/between planes.

Ceramics are a go-to for bypass caps, but selection will vary by application; from impedance \$\frac{1}{j\omega C}\$ you can see that higher \$\omega\$ (freq) will allow lower C values. This is a bit of an art; even experienced designers will wait and tune the values during testing. Also consider Equivalent Series Resistance (ESR); lower ESR is better for bypass, and this will change across part families and sizes.

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