While reading the datasheet for the IS25LP512M series of Flash devices from ISSI I came across this weird command, 32h/38h called "QUAD INPUT PAGE PROGRAM OPERATION" (in section 8.11) with the following timing diagram:
This command seems very odd as it only uses the least significant bit of the data bus to transfer in the command and address, in contrast to all the other QSPI commands (as far as I can tell) like 02h, "Page Program Sequence In SPI Mode" which transfers the command and the address over all the data lines at the same time:
It seems like it would a pain to implement this command on the Flash device and on the Master side.
Googling "32h flash memory" and looking through the results it seems like there are a number of other chips that implement this command, GD5F4GQ4UAYIG, S25FL-S, W25M321AV ect... So I assume it is from some kind of standard. (though it looks like the JEDIC Common Flash Memory Interface standard does not cover commands).
Where did this command come from? Who uses it? Why does it exist?