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This may sound like a very stupid question. However, I am new to the Z80 stuff. I am planning on how to connect the Z80 control signals to a SRAM. But the Z80 has seperate RD and WR, while my SRAM has them combined. My issue is that the Z80 when is reading for example, instead of just low, it makes a square wave. Any ideas?

SRAM Model: TC551001BPL-70 Datasheet: http://pdf1.alldatasheet.com/datasheet-pdf/view/31687/TOSHIBA/TC551001BPL-70L.html

READ IS HIGH WRITE IS LOW

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Assuming timing conditions are satisfied (it has been two decades since I touched a Z80).

  • You can connect the ¬WR signal directly to RD/¬WR in the SRAM
  • You need to connect the ¬RD signal directly to ¬OE in the SRAM
  • You need to generate the SRAM ¬CE signal for read access AND for write access. Which, requires anding ¬RD and ¬WR together and combining it with address decoding to provide ¬OE to the SRAM (a single multiplexer IC can accomplish all of this).

If there is no ¬CE in the SRAM, that probably means that the RD/¬WR and ¬OE signals need to be generated from address decoding AND both ¬WR and ¬RD.

I believe that covers most cases.

As @Janka points out, the Z80 is one of those processors that has different instructions for addressing memory snd peripherals. This requires an extra line (¬MRQ) to be added to the memory decoding.

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    \$\begingroup\$ For the Z80, you had also run -MREQ to the multiplexer enable inputs. \$\endgroup\$ – Janka Nov 3 '18 at 20:52
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If your SRAM has RD/#WR, meaning '1' for read, use #WE (which is '0' for write) and leave #RD open or pulled up.

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  • \$\begingroup\$ You also had to generate the –OE signal for read access. This should be connected to –RD. \$\endgroup\$ – Janka Nov 3 '18 at 20:04

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