# In practical BJTs, why can't Vce become 0 when the transistor is saturated?

Practically it is about 0.2 V when saturation starts. Why can't it go to 0?

• Know about swapping C and E leads? Upside-down BJT, takes advantage of the diode-Vf of Vbc being larger than Vbe. – wbeaty Nov 5 '18 at 4:09
• It can often go to 0.05V or less. 0.2V is just a convenient "worst case" value for specifications. – Brian Drummond Nov 5 '18 at 8:21

## 2 Answers

Think about it - if you are forward biasing the base-emitter junction this means that the base is several hundred mV above the emitter for an NPN example. If you want the collector to be close to the emitter voltage (i.e. at 0 volts) then you are also starting to forward bias the base-collector region and, in-effect, the base keeps the collector potential from ever reaching 0 volts.

This is a simplified answer that suggests that the OP considers the NPN transistor as two back-to-back diodes for the sake of understanding how perfect saturation is impossible.

• How is the base preventing collector to reach the emitter potential?? – Souhardya Mondal Nov 5 '18 at 8:28
• I am sorry but I hardly understood your answer . – Souhardya Mondal Nov 5 '18 at 8:42
• Because the base collector region becomes forward biased and the voltage at the base restricts the collector from fully reaching 0 volts. Just think of the BJT as two diodes like this. In normal non-saturated operation the base-collector diode is firmly reverse biased but as saturation approaches that diode becomes forward biased and stops the collector getting any lower in voltage. – Andy aka Nov 5 '18 at 10:50

Considering an n-p-n BJT, we have Vbe = 0.7 V (approx). Saturation starts to take place when the forward current from the Collector-Base junction starts to cancel out the collector current due to the carrier flow from the Emitter-Base junction. This forward current starts getting significant from a forward bias of around 0.5-0.6 V on the collector-base junction (we already have a forward current for lower values of forward bias but they aren't significant "enough".. Termed as the soft saturation region). So at around initiation of saturation we can write Vbc=0.5 V or 0.6 V, giving Vce(sat) = Vbe - Vbc = 0.1 V or 0.2 V. From this point on, decreasing Vce raises the Vbc forward bias, pushing the device further into saturation (deep saturation)