Short answer: because they can be.
FPGA's did not always exist. For them to be practical, in that they
could be used to prototype logic for later production as ASICs, they
had to be much larger and faster than the logic that would replace
them---but they paid for themselves by being programmable. The life
cycle of a product that started as FPGA before moving into ASIC was
much quicker and cheaper than one that did not. FPGA marketeers were
well aware of this, and charged accordingly.
I once worked on a product whose ASIC was anticipated to cost in the
$100/each range, and we looked into prototyping on FPGA to shake out
the bugs and features in the design, along with providing early
customer demos at reduced operational speed. It would have taken at
least three of the biggest hottest FPGA's available at the time, at
some $2,000 each, to perhaps fit the logic. (Disregarding
inter-package considerations, which were considerable. We decided
against doing FPGA as the significant additional work to partition
into multiple FPGA's would have delayed the actual product release.
The costs for a handful of ultra-expensive FPGA boards would have been
acceptable, but the delays were not.)
Cheaper/smaller FPGA's might be used for lower-volume productions of
modest-sized designs, where an ASIC was never considered due to their
substantial (and ever-increasing) NRE costs. These would be much
further from the bleeding edge, and much less costly, but still have
to be larger and faster than a base ASIC would need to be in order to
make up for the radically decreased space and speed efficiency of FPGA
logic. Again, the marketeers would definitely be doing their homework
and pricing accordingly.
Any piece price for an FPGA that is more expensive than the base
silicon costs given the die size and process are due to the above
marketing factors. Welcome to capitalism! (Of course, FPGA dies are larger, and on more expensive [faster] processes than would otherwise be necessary. This is inherent. Think of FPGA's as an analog of those snap-circuit educational kits. Much larger and more expensive than a dedicated circuit, but highly flexible.)
Yield is also an issue, as FPGA's are terribly inefficient in terms of
logic utilization for their size. It all has to 100% work or there
would be 'programs' for them that could not run. At one time Xilinx
had a program where, once you had a production design locked down, you
could provide them with the configuration and test vectors and they
would fit them onto yield failure dies, packaging the ones that passed
and charging substantially less than the thousands of dollars each for
perfect dies. Of course, the "FP" part of the name no longer applied,
as there was no guarantee that any change to the program could run
on any particular unit. I do not know if this is still offered by
anybody, my guess would be not.