I was just simulating the quantization behavior of ADCs of different bits, on data sampled by a 24-bit ADC. What I noticed that as we go towards ADCs with less bits a DC bias in the signal becomes more and more evident, with maximum value at 1 bit-ADC. The reason for this is, acc. to what I think, is that there are different number of digital codes representing positive and negative analog voltage values, for example in case of 8-bit ADC, we have 1-127(127 digital codes) for positive, 0 for 0 voltage, and -1 to -128(128 digital codes) for negative values, so negative voltages have one more digital code for them. and this effect becomes very clear with 1 bit ADC, where we have only digital codes of 0 and -1, so the sampled signal will always have negative bias, Please see the video below where I do the simulation and you can clearly see the signal moving downwards as I decrease the number of bits, The ADC voltage range is +50 to -50 units. So at 1-bit, I only have 0 and -50 samples and a clear negative DC offset.
So my question, how much of an issue is this ? I can simply remove the DC offset by using a high pass filter in Digital domain, are there any other concerns and ways in which my signal is affected ? Is this a very common issue and what else can I do to remove this DC offset ? Are there ADCs which have equal number of digital codes for positive and negative voltages ? What are they called ?