I found the circuit below online and I have two questions about the reset switch.
No, pressing RESET while the circuit is off will do nothing as the chip is not powered up.
Holding RESET during power up is a different matter and will result in the circuit always powering up with Q0 on. If you don't hold RESET during power up you will get a random LED on every time.
To automate the reset you can add a capacitor - maybe 1 to 10 μF across the RESET button. The result will be that when the power is switched on the capacitor will pull the reset pin high (+9 V) until the reset resistor pulls the pin down to zero by charging up the capacitor.
Pressing the reset button will not have a known effect unless the power supply is within the range for proper operation (3V or more for the CD4017).
When the power is applied the state of the flip-flops in the 4017 is not guaranteed. It may be anything (probably there is some small asymmetry that will make it non-random). To reset it you should have a sufficiently long reset pulse applied after the power rail reaches operational numbers. This is often done with a supervisory chip that contains a precision reference and a timer.
A poor method is to use a capacitor (for example across your switch) which will reset it if the power is applied cleanly but will fail in many other cases. Amateur and cheaply built consumer devices sometimes have such cruddy reset circuits and they often cause problems for the end user.
Not only will it not work, it's a violation of absolute maximum conditions listed on the data sheet.
The sheet specifies
INPUT VOLTAGE RANGE, ALL INPUTS.................-0.5v TO VDD+0.5V
This means that when the chip is unpowered, you should not provide any HIGH voltages to the inputs. Exceeding maximum values formally means that the chip is no longer guaranteed to function to spec.
