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I've done most of the legwork. I've got this design working using 2 set reset(SR) flip flops, but I need to make it using 2 data flips, a.k.a D flip flops.

What I did:

Note the numbers not in brackets are in base 10, the numbers in brackets are in base 2.

State Diagram

state diagram

Note the truth table for a set(S) reset(R) flip flop.

S R |   Q(output)   |     !Q
----+---------------+--------------
0 0 | no change     | no change
0 1 | 0             | 1
1 0 | 1             | 0
1 1 | indeterminate | indeterminate
    | (sometimes 0, | (sometimes 0,
    |  sometimes 1) |  sometimes 1)
  • Present State is represented by P.S,
  • Next State is represented by N.S,
  • A is my most significant bit of input
  • B is my least significant bit of input,
  • x represnts don't care,
  • ! represent not

P. S | N. S |  A  |   A   |  B  |   B
A  B | A  B | Set | Reset | Set | Reset
-----+------+-----+-------+-----+-------
0  0 | 0  1 |  0  |   x   |  1  |   0
0  1 | 1  0 |  1  |   0   |  0  |   1
1  0 | 1  1 |  x  |   0   |  1  |   0
1  1 | 0  0 |  0  |   1   |  0  |   1

Through K-Map I got:

  • Set of A = !A and B,
  • Reset of A = A and B,
  • Set of B = !B,
  • Reset of B = B

This is my design using 2 SR flip flops:

If someone could help me create a circuit with the same functionality except using 2 D flip flops, that would be greatly appreciated.

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  • \$\begingroup\$ Welcome to EE.SE! This appears to be a homework question. As such, you need to show us your work so far, and explain which part of the question you're having trouble with. For future reference: Homework questions on EE.SE enjoy/suffer a special treatment. We don't provide complete answers, we only provide hints or Socratic questions, and only when you have demonstrated sufficient effort of your own. Otherwise, we would be doing you a disservice, and getting swamped by homework questions at the same time. See also here. \$\endgroup\$ – Dave Tweed Nov 9 '18 at 21:56
  • \$\begingroup\$ (In case you're wondering, I generated the state diagram by feeding the following line into the Graphviz dot command: digraph{rankdir=LR;"0(00)"->"1(01)"->"2(10)"->"3(11)"->"0(00)";} I'm really starting to wish that this was built right into the website.) \$\endgroup\$ – Dave Tweed Nov 9 '18 at 22:08
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You just need to apply the same technique, but substitute the truth table for a DFF where you have the SRFF. Instead of separate equations for A Set, A Reset, etc., you'll have two equations — one for the D input of A and one for the D input of B.

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  • \$\begingroup\$ First off, thank you kindly for the help. So I created the equations A and !B for the input of D input of A and !B for the D input of B. I tested my circuit out using a software called MutiMedia Logic, my circuit works for all cases except where P.S. of A=0 and B=1. This state doesn't output A=1 and B=0 for the N.S as it should. Instead both A and B are 0 for the N.S. I think it has something to do with not connecting !Q to anything in both DFFs. Below is a link of a picture of my circuit. I'm not sure what to do the the !Qs. ![](imgur.com/SYPehT6) \$\endgroup\$ – F. Ryan Nov 10 '18 at 0:08

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