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I'm very new to the subject of counters and tried to simulate a four bit ripple counter using a D flip-flop IC 74HCT in LTspice.

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If the above topology is correct I have some questions regarding this counter:

1-) In reality if I implement this circuit, do I need decoupling capacitors for VCC pin as used in opamps? Do PRE and CLR pins require resistors or is it okay to directly connect them to Vcc as in my schematics above?

2-) In what circumstances the propagation delay matter? In my circuit simulation what can I do to simulate and demonstrate the effect of propagation delay?

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Yes, you need bypass capacitors. Otherwise the rail collapse puts the internal latch behavior at risk. The onchip capacitors --- gate-bulk, drain-well, drain-bulk, metal-metal, metal-bulk, etc --- are not large enough to provide the "crowbar" current often seen as gates transition between logic states.

I'd just tie the unchanging pins --- Preset, etc --- to the appropriate rail and be done.

To demonstrate the effects of prop-delay, implement decoders to recognize one or more of the states, say 0000, 1111, 1010, 0101, 0110. Notice all the tiny (100pS?) glitches.

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    \$\begingroup\$ On a real board design, unless you're revising an already-proven circuit, it's a good idea to tie all unused inputs to power or ground using resistors, because you never know when you may need to revise things. It's quite common that having resistors (or traces that you can cut and jump) will save you. Of course, if space is at a premium or if you happen to know that you never make a mistake, you can disregard this comment. \$\endgroup\$
    – TimWescott
    Nov 15, 2018 at 4:12

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