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PCB on top with incorrect vias. Bottom PCB has correct vias

I recently designed my first 2 PCBs. Both have a 5v copper plane on the top layer and a ground plane on the bottom layer. I use short traces and vias to connect top components to the ground plane.

As you can see in my image, the bottom PCB was manufactured as expected. The top PCB was not. The vias in the top PCB have rings around them where there is no copper (thermal relief?) which means nothing connects to ground and my board does not work.

I designed these using EasyEDA and have viewed them in Eagle. I don't see any difference in my two designs, even though they came out differently.

Is there a term for the vias seen in my top board ( the ones that don't connect)? I obviously need to order these again, but I'm not 100% sure I won't get the same faulty vias.

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What probably happened is that you forgot to assign the GND net to the plane. Thus the software saw it as different nets and did not connect the vias.

Software has the nasty habit of doing what you tell it to do, not what you really want or intend.

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  • \$\begingroup\$ I agree with Edgar. This mistake should have been caught by the design rule checks. \$\endgroup\$ – Peter Karlsen Nov 15 '18 at 6:46
  • \$\begingroup\$ Thanks. I'll check for that. EasyEDA has a nasty way of renaming your nets if you happen to connect and merge things with different names. DRC passed but maybe that bit me. Thank you for your help. \$\endgroup\$ – gooberverse Nov 15 '18 at 13:46
  • \$\begingroup\$ In many cases DRC will simply ignore nets without connections. \$\endgroup\$ – Edgar Brown Nov 15 '18 at 14:01

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