Let me start by saying that I am not an EE, and my knowledge in Electronics is basic, so please bear with me and be patient if, initially I am bending a few rules.
In Epee fencing, a touch is awarded when contact is made at the end of a weapon's tip: when A (Analog Pin A0) and B (Analog Pin A1) are in contact, both A0 and A1 read 2,5V and a touch is awarded.
In Foil fencing, I need to establish that a fencer has been touched on its Lame (a conductive jacket). Therefore, in addition to the Analog functionality, I also need to implement a Capacitive sensor on the A0 pin. The Cap sensor uses a digital Pin (D4 in Diagram) to charge the Capacitor via a large (1M) resistor and reads the Voltage/status of a Receiving Pin (here A0).
The A0 pin is therefore used both for Analog and Digital readings purposes. This is the source of my issue, and why I am here.
I have no choice but to share the analog pin A0 for both analog and digital read purposes (there is only one line A). I have established that I cannot read the Analog levels and the Cap sensor output at the same time, without exposing myself to adverse side effects (wrongfully sending 5V to the Cap during the Cap sensor operation when A&B are in contact being one of them...). I, therefore, perform these tasks simultaneously:
- Sampling both Analog A0 and A1 Pins (Analog ON/Digital OFF),
- Sampling Analog A0 as a Digital INPUT (Analog OFF/Digital ON),
My primary concern is to achieve some form of isolation of the Cap sensor when in operation: this is to avoid the 1K resistors getting in the way of my capacitive sensor sampling, and CRUCIALLY, the A1 pin (connected to 5V via a 1K resistor) not charging the Cap during a touch sensing operation, thus destroying the significance of the values sampled.
I also critically need to avoid the limits of the Cap Sensing circuit extending beyond its absolute necessary boundaries, which is not the case if the tip is depressed, or if the 1K resistor is pulling the A0 to GND, preventing the Capacitor from being charged properly.
So, I have a few questions:
- In the diagram, I show what I THINK the solution to this problem is (but I am not saying it IS the solution).
- Do you think I am right?
- Am I going in the right direction using NPN Transistors? Are they used correctly?
- If you did not use this method, What would the correct circuit be, etc,
Thank you very much in advance to all of you for helping me out. Don't hesitate to ask for more details.
Note: changed the schematics to use Q2 as a PNP following a suggestion from 'Captain Normal' below.