I'm trying to design a Constant Current load for testing battery cells using the TLC070 Op Amp (what I happen to have on hand) and a low pass filtered (150Ohm + 470uF cap) PWM input from an Ardiuno. The OpAmp is driven by a 12v rail and the Arduino by 5v supply, all sharing a common ground.

The circuit is based off of this one: CC Load

The issue occurs if I set the input voltage to 0V, the Op amp will not drive the MOSFET (IRFZ44n) again. If the PWM is set to anything but 0, and the power to the OpAmp is turned on, the circuit works as advertised.

Is there a way to solve the issue turning on the CC Load from a 0 input PWM signal to a higher PWM signal?


  • \$\begingroup\$ There's some inconsistencies with what you're telling us and what the circuit above is showing us. For instance, your choice of op amp is the TLC070 but the circuit says otherwise. Also, you mention that a voltage rail is 12v but VCC shown above is 5v... Lastly, and this could be your issue, nothing is driving the drain of your FET and thus sending your FET to cutoff region, you're not going to see anything at the drain. \$\endgroup\$ – user103380 Nov 22 '18 at 0:45
  • \$\begingroup\$ @KingDuken I meant based off as in similar to this in all regards except for the op amp and voltage levels which I have described. It does go into cutoff which is what I expect, what I do not expect is that when I raise the pos input to the opamp, the output does not increase anymore. Regardless I don't think it is an issue of the MOSFET but rather the OpAmp. Once in cutoff the Neg input is 0v and then I raise the Pos input to some positive voltage, yet the output does not change. \$\endgroup\$ – Clement Nov 22 '18 at 1:29

Some op amps can do weird stuff if you ask them to approach the supply rails. Unless the op amp is specifically designed for single-supply operation all the way to ground, or is a true rail-to-rail input and output, it is not guaranteed to work in those conditions.

In this specific case, you are not using one of those opamps but rather a high-current drive one. The relevant section of the datasheet is this one: recomended operating conditions

As you can see, the minimum common mode voltage specification is 0.5V. You are setting it to 0V.

What is happening is that the non-linearities near ground result in the inversion if the gain curve, basically inverting the input terminals. As you raise what is labeled as the positive terminal, its output is trying to go more negative. Thus latching that condition in place.

  • \$\begingroup\$ That seems about right! Thanks a lot, though I do wish this was covered in my course! I just couldn't figure out such weird behaviour though I did notice it going funny on the scope when reaching such low values. \$\endgroup\$ – Clement Nov 22 '18 at 2:06

While you have chosen an answer, I thought I'd add something. Beginning courses don't cover weird behavior, in general, and violating common mode voltages is one of those things. In your case, it produces latching behavior. More common is what is known as phase inversion, and there is a good introductory article here Note that this used to be more common than it is now, as op amp design has evolved, and once upon a time phase inversion was a well-known issue, especially with the (then) new single-supply op amps. In the Dark Ages (about 20 or 30 years ago), most op amps were dual-supply, so operating near ground held no terrors for them - ground was right in the center of their comfort zone. Then along came single-supply and especially rail-to-rail op amps, and the issue became fairly acute.

  • \$\begingroup\$ Thanks for sharing this knowledge! Definitely makes sense indeed! I’ll be swapping out my TLC070 as soon as my LM358s arrive :) \$\endgroup\$ – Clement Nov 22 '18 at 4:14
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    \$\begingroup\$ @Clement - Keep in mind that a 358 will do OK in this particular circuit, since for very low current output the op amp output will still be fairly high due to the Vgs requirements. However, you may well have stability issues at dead zero, due to the limited current drive at low voltages (equivalent to a high output resistance) interacting with the largeish input capacitance of the FET, producing an inconvenient phase shift between input and output. It's not a guaranteed issue, but it's certainly possible and you need to be on the lookout for it. \$\endgroup\$ – WhatRoughBeast Nov 22 '18 at 4:32

The problem is probably caused by the opamps common mode input voltage limitation.

It is not guaranteed to operate with the input less than 0.5V above its ground pin.

Opamps can do all sorts of things when operated outside their limits. including latching up or even inverting their output.

You always need to check on this parameter when operating an opamp in a single supply configuration.

The LM358 shown in your schematic can operate with its input down to small negative voltages on its inputs.

Excerpt from TLC070 datasheet


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