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I'm working with ADC in AT91SAM7S micro-controller. Apart from parameters like ADC clock frequency prescaler and 'sample and hold time' (that I'm familiar with), there is a parameter called 'Startup time' which I don't really understand.

The documentations says: "Each ADC has its own minimal Startup Time that is programmed through the field STARTUP in the Mode Register ADC_MR." My feeling is that this may be related to sleep mode so that when ADC was sleeping and later started it needs some time to 'wake up'. But I don't use sleep mode. Probably ADC is sleeping by default until it is really requested to make conversion.

If I set this parameter to zero then first conversion after program start gives zero code, although channel "End of conversion" flag is set. All subsequent conversions work normally.

  • What is the physics behind this parameter?
  • Why should I program it? Why ADC can't just automatically wait needed time and don't set 'end of conversion' flag until it really woke up and finished conversion?
  • How do I calculate it?
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  • \$\begingroup\$ What sort of ADC is it? Successive approximation, sigma delta with a big FIR? Provide a link to the section in the chip data sheet. \$\endgroup\$ – Andy aka Nov 24 '18 at 15:49
  • \$\begingroup\$ Successive approximation. \$\endgroup\$ – Roman Nov 24 '18 at 15:49
  • \$\begingroup\$ Datasheet link added \$\endgroup\$ – Peter Smith Nov 24 '18 at 16:03
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Looking at the datasheet, this is the time required for the ADC to properly restart from idle mode (there is also an ADC sleep mode which is confusing). Idle mode relates to the processor core, but the startup time appears to also be required in ADC sleep mode (see section 36.5.6 of the datasheet) AT91SAM7S ADC data

It is programmable as the number of clock cycles will vary based on the clock used in the ADC module.

Calculation:

STARTUP: Start Up Time

Startup Time = (STARTUP+1) * 8 / ADCClock

Therefore you should program the register with

STARTUP = (Startup time * ADCCLK / 8) -1 where Startup time is 20 microseconds.

This particular ADC has a fixed minimum time required for (apparently) the analog cell to come back up.

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  • \$\begingroup\$ Yes, I saw these formulas. But anyway it looks to me like a strange design of this ADC, because this parameter doesn't depend on signal characteristics at all. The event about returning from idle state should be present to internal hardware logic. Why the manufacturer wants/allow me to program it? \$\endgroup\$ – Roman Nov 24 '18 at 16:18
  • \$\begingroup\$ As I noted, the time is absolute, but the time is specified as a number of clocks, which is itself programmable. This is not unusual at all in microcontrollers. \$\endgroup\$ – Peter Smith Nov 24 '18 at 16:20

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