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First Schematic with N-Mosfet

schematic

simulate this circuit – Schematic created using CircuitLab

schematic

simulate this circuit

I have a few question on these design. First designed has been built on a bread board and the second design is technically the same thing but with a P-MOS which reduce gives better results at lower voltages than an N-MOS.

In both case, it is being supplied current from a current regulator. The voltage may vary from 0V to 24V depending on the load connected. It's a current source but not an ideal current source that will be able to provide infinite amount of current fixed. For example if set to 0.1A it will output 24V for a 24 Ohm resistor at 1A. But will output 24V at 0.5A for a 48 Ohm resistor.

  1. Is there any real advantage to use such topology instead of using one N-Mosfet. I read that it's easier to drive a N channel mosfet when the load is before the mosfet as it reduce the gap between Vgs and and Vth.

  2. I read that it's better to drive a MOSFET fully ON or fully OFF. In this example 1V will make the M1 MOSFET not completely ON. The solution would be to PWM the voltage set input with a duty cycle of (1/12)*100 = 8.3%.

  3. As the voltage will change from 0V to 12V super rapidly. What's the right way to filter the noise with a cap? I guess that if the cap is too big, it could charge up to 12V faster than it discharge. Which is why I believe this whole schematic looks a bit over engineered as it I'm ending up with a complicated on/off switch. And most component could be replace by a MCU controlling the PWM duty cycle according to a feedback from an ADC.

My goal is to be able to reduce the heat produced by the MOSFET M1.

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    \$\begingroup\$ If Vout being connected to ground works for you then who am I to argue. However, the fact that your circuit is insisting 1 volt is on Vout means you must be wrong. Also, your question gives no clarity to what the circuit is intended to do (given that the circuit is wrong this makes it impossible to answer or understand). \$\endgroup\$ – Andy aka Nov 30 '18 at 11:32
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    \$\begingroup\$ Are you really powering your opamp from a current source? \$\endgroup\$ – Finbarr Nov 30 '18 at 11:53
  • \$\begingroup\$ "I tested it in the simulator and it works" - the schematic you have drawn cannot work. Please change it to match your simulation exactly, or show the actual simulation circuit. \$\endgroup\$ – Bruce Abbott Nov 30 '18 at 12:10
  • \$\begingroup\$ @Andyaka it's a voltage limiting circuit intended to regulate the voltage after a current source. In reality it would be connected to a load then to ground. In this case I really don't mind as the current source would be providing as defined. In essence the current source provide 1A and the voltage regulator limit the load to 1V at 1A. For example an inductive load wouldn't be able to pull more than provided. \$\endgroup\$ – Loïc Faure-Lacroix Nov 30 '18 at 17:07
  • \$\begingroup\$ @Finbarr Yes. Not infinite so let say I have a voltage source of 24V and a limit of 0.1A. If the load was a resistance of 10 ohm, the voltage coming out would be 1V. For a resistance of 20ohm would be at 2V. Any resistance above 240Ohm would output 24V with less than 0.1A. If that's not a current source then what is it? \$\endgroup\$ – Loïc Faure-Lacroix Nov 30 '18 at 17:12
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In this circuit, the positive input is held at one volt while the negative input is at ground. At any supply voltage the op amp will work at, the output will be at nearly the supply voltage, and somewhere around an amp will be passing through M1 directly to ground. The result should be that maintains its supply level at its minimum operating voltage. It might work with a sense resistor between the negative input and ground, but it'll need to be pretty close to one ohm. A divider might be more practical. Not sure why you're running the op amp off an unregulated supply, either.

  1. Not really sure what you're asking, but in this topology the transistors invert. Two are used to cancel the inversion, otherwise you need a whole new topology.

  2. Whether you use the transistor in the linear region or not depends on how you're using it. PWM can be more efficient, but requires additional considerations. It's not a drop-in for this circuit.

  3. A small cap between the gate and source of a FET, in conjunction with a resistor on the gate connection, can produce a nice smooth voltage ramp.

We may be able to help more if you tell us the intended function of the circuit. You say your goal is to minimize the heat dissipated by M1, but this could be accomplished by not building it in the first place.

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  • \$\begingroup\$ I built a similar circuit with N-Mosfet but the mosfet gets really hot at only 1A. It's rated for 3A. I was trying to make it run cooler and eventually make it easier to regulate from an MCU. The opamp could be connected from the regulated voltage, the current source won't give a higher voltage anyway. 1. They're used to invert there because I had no idea how to make it work with only one P-MOS. I'll add the other schematic I made and built on a protoboard. 2. What kind of considerations? \$\endgroup\$ – Loïc Faure-Lacroix Nov 30 '18 at 17:22
  • \$\begingroup\$ Again, what's the ultimate requirement? It looks like you're building a 1V linear regulator. Your main problem is that you've got 23V across M1, so at 100mA you're dissipating 2.3W. That goes up to 23W at 1A, explaining why M1 is getting so hot. (If you're a semiconductor, it's not the amps that gets you, it's the watts.) If you're planning to switch the transistor full on and off, you'll want an inductor and a cap to limit the current and keep the output stable. \$\endgroup\$ – Cristobol Polychronopolis Nov 30 '18 at 20:44
  • \$\begingroup\$ Yes that's what Edgar said. A Linear regulator. It could go from 0 to 24V ideally. In the data sheet, when the FET is completely ON it should have 0.3 Worse ohm resistance with -10Vgs. Which should generate only 0.3W per pulse if PWM is possible. \$\endgroup\$ – Loïc Faure-Lacroix Nov 30 '18 at 21:45
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The stability of the second circuit will be questionable at best. You are placing additional gain in the feedback loop of an amplifier. Op amps are compensated to work at most under unity gain conditions (the expected worst case scenario).

But you have built a linear voltage regulator.

And now you are asking how can you make M1 switch to reduce power consumption. So you are asking how to build a switching voltage regulator.

As you are learning it is fine and even desirable to rediscover the wheel, as this will reaffirm and solidify your knowledge better than if you just search for answers in a book. So you can continue to try to figure out things on your own, it is your choice and it is a reasonable choice.

But we have all seen this movie before, we know of the several alternative topologies, any answer we give you will be geared towards at least one of them. So I will hide the search term that you are looking for, but I will give you a hint: A low-pass filter is used to extract the DC value of a PWM signal.

Mouse-over the box to reveal the terminology:

You seem to be converging towards a buck converter topology.

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  • \$\begingroup\$ Now that makes a little more sense, when you say a linear voltage regulator, I guess it means that it's designed to regulate linearly using voltages in-between what I can produce. I do know about buck/boost converter but I was trying to find a topology that didn't include an inductor. My multimeter advertise it can measure inductor but I have big suspicions on its capabilities as it never stabilize on a value. Which is why I tried to find a topology that can be built without them as it would make it easier. Then I'll find a way to measure them. \$\endgroup\$ – Loïc Faure-Lacroix Nov 30 '18 at 20:12
  • \$\begingroup\$ "Linear voltage regulator" is the name of regulators that operate in linear region (i.e., the same category of class A amplifiers). This basically translates to lots of wasted power leading to low efficiency, but also low-noise. Do note that a buck converter, if you ignore all of the design equations, constraints, and rules of thumb, can be seen as a PWM signal being filtered by an LC low-pass. (In many regimes it is not true PWM as removing the active low-side drive improves efficiency). \$\endgroup\$ – Edgar Brown Nov 30 '18 at 21:47

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