First Schematic with N-Mosfet
I have a few question on these design. First designed has been built on a bread board and the second design is technically the same thing but with a P-MOS which reduce gives better results at lower voltages than an N-MOS.
In both case, it is being supplied current from a current regulator. The voltage may vary from 0V to 24V depending on the load connected. It's a current source but not an ideal current source that will be able to provide infinite amount of current fixed. For example if set to 0.1A it will output 24V for a 24 Ohm resistor at 1A. But will output 24V at 0.5A for a 48 Ohm resistor.
Is there any real advantage to use such topology instead of using one N-Mosfet. I read that it's easier to drive a N channel mosfet when the load is before the mosfet as it reduce the gap between Vgs and and Vth.
I read that it's better to drive a MOSFET fully ON or fully OFF. In this example 1V will make the M1 MOSFET not completely ON. The solution would be to PWM the voltage set input with a duty cycle of (1/12)*100 = 8.3%.
As the voltage will change from 0V to 12V super rapidly. What's the right way to filter the noise with a cap? I guess that if the cap is too big, it could charge up to 12V faster than it discharge. Which is why I believe this whole schematic looks a bit over engineered as it I'm ending up with a complicated on/off switch. And most component could be replace by a MCU controlling the PWM duty cycle according to a feedback from an ADC.
My goal is to be able to reduce the heat produced by the MOSFET M1.