First of all, let me jump to the solution directly:
The schematic illustrates the topology of the oscillator. The only component added to your original network was R3. The value and op-amp I picked are kind of arbitrate since it is used to illustrate the idea.
The plot the captured the waveform on Vout, V-, and V+.
Now, let take a closer look at the circuit and analyze how it works.
The first thing to keep in mind is that this is NOT a negative feedback circuit. The virtual short/open, or feedback gain techniques won't apply here.
Take a look at the two networks below:
simulate this circuit – Schematic created using CircuitLab
The difference is the polarity of the op amp. The right side one is a gain-2 amplifier because it has negative feedback, while the left one is a comparator with hysteresis.
Since you want an oscillator, the left side circuit is what you need. Imagine
Vin sweeps from low to high, at the very beginning, V- < V+ and V+ = Vdd*R1/(R1+R2). This is the rising edge threshold of the comparator.
Once Vin crosses this threshold, Vout of the op amp will drop to Vee, yielding V+ = Vee*R2/(R1+R2) (note that Vee is a negative value). This is the falling edge threshold.
If Vin starts to sweep from high to low, Vout won't change until Vin is lower than the falling edge threshold.
With this in mind, let's get back to the circuit in our solution. R1, R2, and R3 sets the rising and falling thresholds:
The rising threshold V_rise = Vdd* R1 / [R1 + (R3 // R2)]
The falling threshold V_fall = Vdd* (R1//R2) / [R3 + (R1 // R2)]
(This assumes the op amp is ideal and has rail-to-rail out swing)
Therefore V_rise > V_fall. In your original circuit, the R3 = +inf. (open circuit) V_fall = 0. Therefore, it can't oscillate.
The switching frequency can be adjusted by the RC time constant formed by R4 and C1. Pick R4 according to the op amp's driving capability and C1 according to the frequency.
Changing the ratio between R3 and R1 adjusts the duty cycle of the network. A larger R3/R1 will yield a larger duty circle. In your original circuit, R3/R1 = +inf. Therefore you duty circle is 100%, and the circuit failed to oscillate. That's another point of view to see why your circuit failed to operate.
One thing to keep in mind is that this network's oscillating frequency and duty cycle are not decoupled. That means every time you change R1, R2, and R3, you must change C1 again to get exact the previous frequency.
The low value limit of R1, R2, and R3 should be selected according to power consumption restrictions, while the high value limit are thermal noise.
To achieve good jitter performance, NP0 ceramic cap can be used for C1.
Finally, in real life, if op-amp's output is used as your clock output, it is unlikely (but not impossible) you will get rail-to-rail voltage swing. This can be easily solved by adding an inverter after Vout.
Also, the same oscillator can be achieved by replacing the op-amp and R1~R3 with a single schmitt trigger inverter: a much cheaper and a simpler solution.
I hope this answers your question.