0
\$\begingroup\$

I am very new to circuitry and have attempted to make a circuit (only using IC's) which displays 0's and 1's from the shift register as LED's either on or off, and through the use of a 555 timer shift these values along every so often.

My circuit: Image of my circuit

2 555 timers one with 10k resistors and the other with 20k, both with 100 micro farad capacitors. These timers are communicating with the shift register to make a series of moving LED's

Sorry if the diagram is a bit messy, this was very rushed. Basically I am using 2 555 timers on astable mode to tell the register to shift data or store new incoming data. One of the timers is running at double the entire cycle of the other (or at least it should be and I believe that is a possible issue), and thus when the timers match the shift register will shift in a 1 and when not a 0, this is then displayed via a series of LED's.

My issue: The circuit is running some what fine until a few seconds in and then the register begins to shift in only 1's. I have no idea why this is occurring I have already disassembled and reassembled the circuit 3 times and I don't see a change.

Another but way less prominent issue which I thought I should mention, whenever I start the circuit I am given a random (it may not be) series of on and off values stored in the register.

Sorry if this seems a bit much, I am very new to circuitry and wanted to start moving away from using micro controllers for everything. This has become very tedious for me and just wanted an opinion or two.

Thanks.

\$\endgroup\$
  • \$\begingroup\$ try using 33k instead of 20K in the second 555, also fit the CV capacitors on the 555s \$\endgroup\$ – Jasen Dec 2 '18 at 6:50
0
\$\begingroup\$

Here is an improved version of your design: blinking LED schematic

We will go over this design first. Then issues in the original design will be discussed.

1. Principle of Work

The U1,a 555 timer, generates a square wave of f_clk = 1/[ln(2) C2 (R1+R2)].

The U3 is a frequency divider formed by a D flip flop. (You can google how it works)

The output of U3 is also a square wave whose frequency f_ser = f_clk/2.

The register shifter chip U2 takes in the clock at f_clk and SER at f_ser. The 8 LEDs then all blinks at f_clk, after the first 8 clocks. All the even number LEDs and odd ones blinks in an out of phase manner.

R3 and C3 keeps SRCLR_b low for a short time to reset the U2 the first time it powers up. This causes all the LEDs to be off at power on.

A 560ohm resistor is added in series with each LED to limit the current through U2. The value of 560ohm is from U2's datasheet. Please select the value according to the corresponding LED.

A 0.1u decoupling cap are added for each IC.

2. Issues from the Original Design

  • asynchronous clocks

Two separate 555 timer networks mean their frequencies are not synchronized. The resistors and capacitors have errors. e.g. 5%. It is then very possible that one timer is running at f = 1/1.4s, while the other one f = 1/(1.45s *2). Then after a while, what will happen? You tell me :)

  • no reset from the very beginning

Once your register shifter chip powers up, since there is no reset, your LEDs' states are random. The new design alleviates this issue by using an RC network. However, if your power supply ramps up very slowly, you need to either adjust the RC network or use an RESET chip instead.(why?)

  • no resistors in series with LEDs

This is a serious issue and may damage your chip. The LEDs will clamp the register shifter's output to about 1~3V, depending on the type of LED. Your chips input current limit is 70mA. During normal operation, 4 LEDs are on at the same time. That can be more than 70mA, not to mention that if error happens, all the 8 LEDs can be on at the same time.

Therefore, current limiting resistors are must. I may even use LED driving chips if necessary.

  • no decoupling cap

This is an issue if you want to design reliable circuits. However, since this one is a "digital" design, I guess it may even work without decoupling caps. Nevertheless, it is a critical engineering practice to use decoupling caps, as mentioned by Spehro.

  • 100uf cap is too large :)

I changed the R C of 555 timer from 10kohm and 100uf to 100k and 10uf. 10uf is more available, cheaper, and of smaller footprint for low voltage ceramic cap.

Now, some comments on the schematic: it is better to use net names to connect pins when the wires got crowded.

Finally, there is something for you to think: can you predict the state of LED1 at the first clock?

\$\endgroup\$
  • \$\begingroup\$ Thanks for the very in depth response, I am taking all of this into account. I may need to go out and buy some more stuff (e.g. frequency divider), and I also have to read up on some of this (I am very new to circuitry). Hopefully what you have suggested works (will comment back). Thanks! \$\endgroup\$ – Oliver Dec 6 '18 at 1:49
  • \$\begingroup\$ Hey, got the circuit working just! Just wanted to say thanks for the advice! I learnt a lot from making this and even from the feedback, I learnt a lot! Basically, as you stated my 555 timers were not working in sync, and I did not clear the data stored in the register on boot! Thanks for the help! :) \$\endgroup\$ – Oliver Dec 8 '18 at 22:58
  • \$\begingroup\$ Glad that it was helpful:) \$\endgroup\$ – Yong Liao Dec 8 '18 at 22:59
0
\$\begingroup\$

The power-up state of the HC595 is not defined, so it's normal for some random-looking set of flip-flop states to be present.

You don't show any bypass capacitors in your circuit. The two oscillators are not synchronized in any way, so it might well be happening that they are locking to each other from disturbances caused by switching.

You can try adding supply bypass capacitors (at least 100nF on each chip) and going with a ratio more like 3:1 than 2:1.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.