I'm placing bypass capacitors underneath a BGA package. In some cases the caps cannot land directly on the vias-in-pad ("VIP"), so I'll need short traces from the VIPs to the caps:
In this example image, the cap is 0201 (0603 metric) and the BGA has 0.4mm spacing. The VIPs are 6-mil (0.15mm) holes filled with conductive material. In the actual design, I'll have wider connections between the VIPs and the capacitor than shown here.
However, this causes the following problem: The BGA balls are connected to the power/ground planes through the inductance of the VIPs, and then there is additional inductance (the other half of the VIPs) between the planes and the cap on the other side. My concern is that the capacitor won't actually accomplish much, since any noise will hit the planes first and will be partially isolated from the capacitor.
A possible solution is to run the VIPs through the PCB without having them contact the power planes, then to the caps, and place an additional set of VIPs (to the power planes) on the capacitor pads. But then I've really increased my loop area, which I obviously don't want to do.
Are these valid concerns? What are the best practices here?