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I am interested in using an STM32 to flash an sof or pof file onto a Cyclone IV FPGA. The sof/pof will be stored in SPI flash memory, and the plan is to use the STM32 as a programmer. I haven't been able to track down any projects that do this but am super keep to learn if and how it could be possible.

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You can read the FPP configuration of FPGA datasheet which teaches you how to program FPGA with uP(STM32). What you should pay special attention is the MESL configuration and let STM32 use correct timing provide by the FPGA datasheet to load the sof/rbf.

enter image description here

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  • \$\begingroup\$ This isn't really the applicable/advisable option. You are showing a parallel connection from an external memory, which is probably not what the asker has wired or available. They probably want a synchronous serial mode, not this. \$\endgroup\$ – Chris Stratton Dec 6 '18 at 0:07
  • \$\begingroup\$ @ChrisStratton You are right. In FPP mode, the FPGA can't directly read SPI flash. The serial data should be translated into parallel data in STM32. \$\endgroup\$ – Ross Dec 6 '18 at 0:52
  • \$\begingroup\$ The asker is unlikely to want to dedicate 8+ STM32 IO's to this; they probably want a synchronous serial solution. \$\endgroup\$ – Chris Stratton Dec 6 '18 at 1:13
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It's definitely possible; all major FPGAs are designed to be programmable through a serial port from an external controller.

I don't know whether you've already consulted the official documentation in this matter, in case you haven't:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf

What you want is the single device serial configuration, page 8.

The FPGA just works as SPI master and clocks the STM32's SPI FIFO; your job as firmware designer is too hook into the "FIFO half empty" interrupt and make sure the next amount of data is DMA'ed into the SPI FIFO.

ST has several examples that do that; not quite sure which one fits your application best.

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  • \$\begingroup\$ While it is implicit later in your answer, it might be worth clarifying in the opening that this is a synchronous serial port, since "serial port" on its own tends to mean asynchronous. \$\endgroup\$ – Chris Stratton Dec 6 '18 at 0:08

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