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I am designing a board with a ±2.5V analog domain and a 3.3V digital domain where space is at a premium. Digital and analog grounds only connect at a single point near the supplies. As such I am using/choosing among a few components that have integrated level shifting so as to directly interface with the 3.3V digital domain. Some of the choices are:

This is a low-noise design where analog signals in the 1µV range will be measured. The main A/D converters do have separate analog and digital supply connections and their Nyquist frequency is 1MHz. This problem particularly applies to the analog switches, but it is much less of a concern for the D/As as either of these will serve auxiliary purposes and will be AC-coupled into the signal paths.

However the 0.8V that the 3.3V rail is above the analog rail introduces problems, as it will bias the protection diodes on some of these components. The same can be said for digital return currents if I connect some of these component ground terminals to the analog ground.

My intended path of action is to:

  • Connect all (very slow) digital signals to the switches through 10kΩ resistors, thus limiting the current through the ESD protection diodes into the analog supply to <80µA. (The stated maximum for the switch is ~20mA, power consumption in the analog rail is >10mA) With the 0.1µF bypass capacitor these will form a ~200Hz lowpass filter.
  • Possibly add ferrites to the +2.5 supply rail to the analog switches (after the bypass capacitor) to further reduce any noise injection into the analog supply.
  • Use digital ground and supply for the D/As. With possibly some filtering of their output.

Does this plan of action seem reasonable?

Is there anything I am not considering?

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  • \$\begingroup\$ How do you plan on keeping EMI out of the more sensitive analog areas? I wonder if a faraday shield might be worth a moment's thought. \$\endgroup\$ – jonk Dec 10 '18 at 19:38
  • \$\begingroup\$ @jonk I have done similar designs (not this space-constrained though) and EMI is not a big issue, mostly because I plan ahead by keeping in mind the sampling frequency when any large switching component comes into the design and by reducing slew-rate of digital signals. I do have EMI shield clips in the schematic in case it becomes a problem. The specific issue here is that these components purposefully introduce digital currents into the analog supply paths. \$\endgroup\$ – Edgar Brown Dec 10 '18 at 19:44
  • \$\begingroup\$ Thanks. I was curious and I appreciate hearing your thoughts. \$\endgroup\$ – jonk Dec 10 '18 at 19:51
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A star (single-point-common) ground is a traditional approach, but somewhat heavy handed. Openings in the ground plane can cause other EMC problems for traces which cross this boundary unconditioned.

The main point is to keep digital noise from sensitive analog circuitry. Return currents in ground paths can result in small voltage differences.

The modern opinion (since it's not so absolutely clear that either is best in all cases) is to use a single, low-impedance ground plane and use routing rules to separate your digital returns from your analog. Small current loops, such as those in switching supplies, should be as tight as possible and connect at a single point to the plane, so the large loop currents don't disrupt the surrounding circuitry measurably.

Needless to say, digital and switching signals should be as far as possible from the sensitive analog signals, but you don't have to be obsessive about it. They're coexisting fine on the chip, which is smaller than the board.

Try to pick an IC that has largely digital signals on one side, and the most sensitive analog signals on the other, it makes layout easier. Most of the new ones observe this protocol.

Finally, some guard traces around the analog inputs may reduce the crosstalk even further if needed.

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