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I am routing LVDS pair on a flex board. The signal is 264MHz. I used Saturn PCB design to calculate width and spacing between conductors. The targeted impedance for diff pair is 100 ohms, which is dependent on the width/space between conductors and hight to the reference plane. The reference plane is a ground which I choose to be layer 3 (of 4) in my design. Since this is the flex board it is very thin 8 mills total thickness, those it is difficult to create required hight to the reference plane. The reference plane is not far enough to accommodate 100-ohm differential impedance.

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I created coplanar waveguide on the same layer as the differential pair to serve as a coupling for the diff pair. Unfortunately, the geometry of the board does not allow me to have this waveguide run all the way to the source. Those now I have a coplanar waveguide with a 6 mills spacing to diff pair guiding LVDS signal half way to the source and after LVDS signal coupled to a reference plane which is 3 mills away (Zdiff = 69 ohms). I also should mention that layer 2 is a power layer, those I believe LVDS signal introduces noise on the power supply. I could move power on layer 3 and have ground on layer 2. However, Zdiff going to get even worse then. I am torn here. Any suggestions on how to route differential pair on a very thin board? Would it be better if I only couple to the ground plane and not use a waveguide?

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    \$\begingroup\$ If you have a power plane under the diffpair, it will operate as reference plane and screw your impedance. Is it possible to remove all copper from internal layers under the diff pair and place reference ground to the opposite side? \$\endgroup\$
    – TemeV
    Commented Dec 17, 2018 at 21:05
  • \$\begingroup\$ I still need to bring power to the chip which is a source of LVDS signal and since the geometry of the flex is so narrow LVDS and power are on the top of each other. \$\endgroup\$
    – semenoff
    Commented Dec 17, 2018 at 21:11
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    \$\begingroup\$ Ok, Then you could at least put the power on layer 4, GND on layer 3 and LVDS on layer 1. This would maximize the distance and allow quite close to 100 ohm impedance. I would leave out the waveguide if you can't have it all the way from the source to load. Do you really need to have 100 ohm? Depending on what bus it is, you could use smaller impedance and just terminate it correctly to that impedance. \$\endgroup\$
    – TemeV
    Commented Dec 17, 2018 at 21:34
  • \$\begingroup\$ I will move the power plane. Unfortunately, I also have I2C and clock signal that run to the chip. I need to keep those away from LVDS. Right now clock 24MHz and I2C are on the bottom layer 4 and ground on layer 3 separates the clock from LVDS and power. If I swap ground and power now I have clock ringing on a power. I understand that I have to compromise on integrity here. The design works right now, so I assume the chip is tolerant and doesn't require exact 100-ohm impedance. I am more concerned about how reliable this design will be when the time comes for EMC testing. \$\endgroup\$
    – semenoff
    Commented Dec 17, 2018 at 21:51

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First, 98 ohms is probably close enough to 100 for 9 out of 10 applications.

Second, I expect most flex vendors to support narrower than 5 mil traces (although I'm not sure how much it impacts reliability).

Third, Are you sure 4.6 is the right Dk for your flex material? Checking one product, polyimide might be closer to 3.4.

Fourth, you can increase the spacing between traces to increase Z0.

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  • \$\begingroup\$ Thank you for your suggestion. I will ask my fabricator for a thicker polyimide between ground and top layer. Perhaps I move ground on layer 2 and specify AP 9161R for the substrate material between these two layers. \$\endgroup\$
    – semenoff
    Commented Dec 17, 2018 at 21:56

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