There are two clocks in the system, clk2 is derived from clk1 with a 180-degree phase shift. There is 1-bit data from clk1 to clk2.
I know this is a kind of asynchronous scenario and the traditional method is the use of 2 FFs or an asynchronous FIFO to synchronize the data. However, since these two clocks have a fixed phase difference, so is it possible to synchronize the data JUST with SDC constraints? If it is possible, how to set the SDC?