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I was solving exercise questions on caching from the book Computer Organization and Architecture by William Stallings. The exercise has following question:

The performance of a single-level cache system for a read operation can be characterized by the following equation:

$$T_a = T_c + (1-H)T_m$$

where Ta is the average access time, Tc is the cache access time, Tm is the memory access time (memory to processor register), and H is the hit ratio. For simplicity, we assume that the word in question is loaded into the cache in parallel with the load to processor register.

a. Define Tb= time to transfer a line between cache and main memory, and W= fraction of write references. Revise the preceding equation to account for writes as well as reads, using a write-through policy.
b. Define Wb as the probability that a line in the cache has been altered. Provide an equation for Ta for the write-back policy.

The solution given was:

a. $$T_a = T_c + (1 – H)T_b + W(T_m – T_c)$$ b. $$T_a = T_c + (1 – H)T_b + W_b(1 – H)T_b = T_c + (1 – H)(1 + W_b)T_b$$

Doubts

  1. Shouldnt it be: $$T_a = T_c \color{red}{\times H}+ (1-H)(T_m\color{red}{+T_c})$$? I felt "× H" is required because its during cache hit, when we do only cache access. Also we need "+ Tc" represents cache access time during cache miss.

  2. I know what is write through and write back caches. In write through cache, both main memory and cache are simultaneously updated and in write back cache only modified cache word is copied to main memory when that word is to be replaced with other one from main memory. I also understand why we replaced Tm with Tb. However I am not able to understand how above equations have be arrived. Can someone explain how those formulae were come up? How those two terms involving W make sense.

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Unless you did it intentionally, you can see how your edited equation is equivalent to the one they provided. Instead of separating cache access time between a hit and miss as you have done, they have taken it unified as \$T_c\$. Then it doesn't need to be accounted for when calculating memory access time

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  • \$\begingroup\$ I am not getting "Instead of separating cache access time between a hit and miss as you have done, they have taken it unified as Tc." Can you show what equality hold between terms in my equation and book's equations? \$\endgroup\$ – anir Dec 20 '18 at 13:03
  • \$\begingroup\$ Can you explain the logic how to deal with W and Wb? \$\endgroup\$ – anir Dec 21 '18 at 16:00

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