After going through several datasheets for devices from "Analog Devices’ family of high voltage surge stoppers, overvoltage protection, overcurrent protection, and circuit breaker ICs", I found that external reverse polarity protection is done by the same method but found some differences in some details.

Below are three schematics from three different datasheets. I am interested in finding out why are these schematics different as I think that they shouldn't:

document 1

document 2

document 3

An explanation on how the reverse polarity protection circuit works is present in LTC4366 datasheet (page 20). I should note that the three controllers have similar absolute maximum rating for the gate pin negative voltage of -0.3V.

When comparing the 3 circuits:

The first circuit seems ideal as the diode D1 blocks excessive positive voltage from the input supply passing to the GATE and D2 prevents damage to the LTC4366’s GATE pin by clamping it at ground when the M2’s gate is negative. The 270k resistor R4 is small which will lead to faster switching-on time of M2.

The second circuit rely on the large resistance R5 to block excessive currents from passing to the GATE pin in the event of excessive positive voltage at the input supply or negative voltages present at M2's GATE.

The third circuit uses a diode to block the excessive positive voltage at the input supply but uses nothing to protect the GATE pin from negative voltages (perhaps rely on the resistance of R4(240k).

My question is: If the three circuits are intended for the same purpose of reverse polarity protection, why am I seeing 3 different versions and most important which circuit is the best?

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    \$\begingroup\$ Which designs fail 1st beyond +/-500V is a better question. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Dec 26 '18 at 18:15
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    \$\begingroup\$ Analog Devices is not prone to making mistakes, either in design or publishing of datasheets. Since each device has a custom over voltage clamp topology to match that design, who is to say any of these designs are wrong? Picking a 'best of' in terms of protection maybe over analysing a problem that does not exist. \$\endgroup\$ – Sparky256 Dec 27 '18 at 2:52
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    \$\begingroup\$ I think you need different topologies because the working input voltage levels vs the allowed gate voltages of the MOSFETs are different, and you also have to protect the MOSFETs. \$\endgroup\$ – Laszlo Valko Dec 27 '18 at 5:27
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    \$\begingroup\$ @TonyEErocketscientist , where does the +/-500v come in an 12/24v automotive environment ? \$\endgroup\$ – ElectronS Dec 27 '18 at 10:13
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    \$\begingroup\$ As far as I can see, what you have circled in red is not the only part which varies. \$\endgroup\$ – Daniel Tork Dec 28 '18 at 12:22

Actually I think that none of the components you've circled in all the schematics are responsible for the reverse voltage protection at all (as you correctly pointed this out yourself in all three cases: "diode D1 blocks excessive positive voltage from the input supply", "R5 to block excessive currents from passing to the GATE pin in the event of excessive positive voltage at the input supply" and "a diode to block the excessive positive voltage at the input supply"). The secret actually lies more in the special arrangement of the diodes and transistors immediately near the input supply and the associated MOSFETs driven by them (D3, D4, Q2 and M2 in the first circuit, D2, D3, Q3 and Q2 in the second, plus the associated bias resistors of course). They ensure that voltage is only supplied to the circuits if it is of correct polarity. The 3rd circuit is a bit different in this manner (with the additional Zener diode D1 for regulation, probably because of this IC's wider input voltage range), but other than that the reverse polarity protection circuit is still the same (ensured by components D2, Q3 and M2). The mechanism of these circuits is explained in the LTC4366 datasheet you've linked in your question quite well I'd say.

  • \$\begingroup\$ "The devil is in the detail". I'm curious to know why are these circuits interfaced differently. \$\endgroup\$ – fhlb Jan 1 '19 at 9:17
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    \$\begingroup\$ @fhlb It has to do with multiple factors including the ICs' internal design and the reverse voltages (and transients) the circuits are meant to protect against. The 3rd design is different because "The LTC4380 is designed to withstand reverse voltage without damage to itself.", so for its Vcc pin a simple Zener diode is enough for adequate protection. The 2nd design is only meant to protect against reverse polarity and -80V surges, not 150V (as in the 3rd design) or 250V (like in the 1st one). \$\endgroup\$ – CoolKoon Jan 1 '19 at 13:59
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    \$\begingroup\$ Despite that it still utilizes an additional diode (D1, a TVS diode) as well. The 1st design offers protection against the highest voltage surges (250V to protect against surges coming from an alternator without dump suppression), but this comes at the cost of using more diodes that cause "extra power loss, generate heat, and reduce the available supply voltage range. During cold crank, the extra voltage drop across the diode is particularly undesirable." - In short, choosing the "right" design is about making compromises, as always. You either make it more efficient or more fault tolerant. \$\endgroup\$ – CoolKoon Jan 1 '19 at 14:09
  • \$\begingroup\$ what you have quoted ("extra power loss...") was a description of the drawbacks of using a series diode to block reverse voltage. \$\endgroup\$ – fhlb Jan 1 '19 at 17:40
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    \$\begingroup\$ you're right... screenshot fixed... \$\endgroup\$ – fhlb Jan 1 '19 at 18:13

The case for surge protection is disconnection of the battery +ve terminal with an inductive load that results in a negative spike.

The Gate voltage limit is due to the Schottky diode protection built in that cannot tolerate more than 1 mA or so external negative input at that voltage in order to protect the CMOS driver against the common SCR substrate failure mode.

Thus the front end gate drive is thru a high resistance to withstand -500V or less depending on the design class and test criteria. The negative input spike ought to turn on the NPN to shutoff the front end FET but before this happens the CIss is sufficient to conduct the spike so the clamp must be fast and the collector R must be higher than 250k.

The 1st design adds a diode OR clamp to ground to support this as well, using diodes with good VI characteristics at desired speed.

  • \$\begingroup\$ honestly I was baffled by the diodes selection. I first thought that diode (D1 in first schematic, D3 in 3rd one) should be of schottky type so that the gate drive won't drop at normal operation. I read on the LT's forums (ez.analog.com/power/f/q-a/52531/ltc7000-negative-voltage) that a low leakage diode is suggested instead. Can you please update your answer and state which scheme (in your opinion) is better to protect the gate pin from both negative and positive transients (as well as overvoltage and steady reverse polarity events). I'm trying to comply with the ISO-16750-2 24V \$\endgroup\$ – fhlb Jan 1 '19 at 9:42
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    \$\begingroup\$ @fhlb Actually D1 in the first schematic is there only for the reverse polarity protection, it's not supposed to let too much voltage through at all (evidenced by the presence of R4 and D2 as well). M2 is meant to be driven by the input voltage after all, not the IC. The same's the case with D3 and R4 in the 3rd schematic. And that's indeed perfectly in line with what you've read about preferring a low leakage diode as well. \$\endgroup\$ – CoolKoon Jan 1 '19 at 13:54
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    \$\begingroup\$ Because air ionization time to start the arc has a delay,across a small capacitance,C the -ve voltage spike drops dV/dt=I/C but when the arc strikes with tunneling, the arc current slew rate is even faster in the xxx picosecond range with resonance making the task of an "ideal diode" here much more complex V(t),I(t) impulse source. Hence all the diodes. My pick is the 1st design. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jan 1 '19 at 14:23
  • \$\begingroup\$ @CoolKoon D1 is also used to block high voltage from passing to the gate of M1 in the case of input overvoltage (note that the source of M1 is different from the source of M2). When M1 is shut-off, its gate would be driven by the protection controller to the voltage present at the OUT pin while the gate of M2 has a voltage that is equal to the input voltage. if this voltage pass to the gate of M1, the Vgs(max) could be violated (the OUT is sometimes lower than Vin by more than 20V) \$\endgroup\$ – fhlb Jan 1 '19 at 16:00
  • \$\begingroup\$ @fhlb Of course D1 is also used to block surges from passing to the gate of M1, but normally (i.e. in pretty much all the other sample schematics of the datasheet) the GATE output of the IC (the LTC4366) is not connected to the input voltage at all, so without the reverse polarity protection circuitry this problem wouldn't even exist. \$\endgroup\$ – CoolKoon Jan 1 '19 at 17:04

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