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I am designing a high voltage board, 10,000 VDC. I wish to use a suitably rated capacitor such as the DHR4E4A102K2BB. When I have been studying the IPC-2221 and IEC 61010 standards the conductor clearance should be in the order of 0.00305 mm/volt, therefore you would think that for a 10kV rated capacitor the lead spacing should be at least 30.5mm.

However, when looking at many datasheets they are around 9.5mm +/-2mm.

enter image description here

In my application one lead needs to be at 10kV and the other at 0V, so I would expect arcing/flash over to occur.

What am I missing?

EDIT TO SHOW PCB

Here is what I have so far with the PCB which shows the capacitor and slots (yellow line is board edge/routing) enter image description here

EDIT TO SHOW SCHEMATIC

Schematic added to show that is I added DC grading resistors in parallel to the capacitor then it would create a potential divider network and my outputs would be less than 10kV. Hence the discussion about headroom. I have 10kV coming in and I need 10kV (or there abouts) going out.

enter image description here

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Most of these components is unsuitable for continuous high voltage. On top of what @Spehro said, creepage will be impossible without immersing it in transformer oil and I would not be allowed to put more than about 3 kV across that 7.5 mm lead spacing, but that could be slightly more in your case depending on company policy, altitude range for the product, humidity and pollution degree of the environment. (pollution degree would normally just relate to creepage)

What you normally end up with when using components intended for consumer electronics or light industrial use is to derate them and end up with a series-parallel array of them. Be aware of capacitor tolerance and calculate your maximum misdistribution and make sure you have rating accordingly.

Source: high voltage design engineer for the past five+ years.

EDIT: Here is a schematic and transient simulation for you. I don't know your load nor why you have 5 Mohm output resistance, so there are several assumptions here. This is absolute worst case scenario for +-10 % resistors (47 Mohm) and +-20 % capacitors (1 nF). If you are hand-building it, you can probably hand-tune each value to match much better than that. enter image description here

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  • \$\begingroup\$ So your suggestion is to place multiple lower rated capacitors in series, thus increasing the clearance and creepage between the HV on the first cap lead and the 0V on the final cap lead? Nice idea. I did not follow this part Be aware of capacitor tolerance and calculate your maximum misdistribution and make sure you have eating accordingly. \$\endgroup\$ – tomdertech Dec 27 '18 at 23:20
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    \$\begingroup\$ Yes, that’s correct. If you connect two in series, you are NOT guaranteed to have half the voltage across each. If the capacitors are +-20 % tolerance, you must assume +20 % one one and -20 % on the other, and the one with the lower capacitance will see significantly higher voltage for any AC signal. For DC, it’s only the leakage which determines the distribution, and it’s almost never guaranteed. You must add grading resistors in parallel, but they will be subject to the same mis-distribution. High voltage is not easy and nothing will work your way by itself! \$\endgroup\$ – winny Dec 29 '18 at 10:26
  • \$\begingroup\$ Excellent advice. Would parallel grading resistors not act as a potential divider? I am designing a simple RC network, so have a 5M ohm in series with the capacitor which connects to ground. The grading resistors would form a divider, no? \$\endgroup\$ – tomdertech Dec 29 '18 at 12:25
  • \$\begingroup\$ That’s the purpose. For DC, your resistors sets the division ratio. For AC, your capacitors sets your division ratio. Please do calculate your worst case voltage stress for both DC and AC with maximum tolerance. \$\endgroup\$ – winny Dec 29 '18 at 12:29
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    \$\begingroup\$ Sure. Any help however timely is much appreciated :-) \$\endgroup\$ – tomdertech Jan 4 at 10:27
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Breakdown voltage of air is about 3kV/mm so it won't typically break down. The requirement for creepage for good design is more than that, so you can route an unplated slot between the pins. That takes care of the PCB design.

You still have the creepage distance over the capacitor surface to contend with- it's probably not adequate unless you coat the board or pot the circuit.

By the way, that Murata part has a final order date of 'September 2019, meaning it is marked to be permanently discontinued.

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  • \$\begingroup\$ I have removed most of the FR4 between the pads. So are you saying that the capacitor voltage is not rated for its own creepage distance? Where would I coat the board? \$\endgroup\$ – tomdertech Dec 27 '18 at 23:17
  • \$\begingroup\$ The slot can be long. You could put conformal coating on the board + capacitor (after assembly, obviously). \$\endgroup\$ – Spehro Pefhany Dec 27 '18 at 23:18
  • \$\begingroup\$ I have edited my original post to show the PCB I currently have with the slots. \$\endgroup\$ – tomdertech Dec 27 '18 at 23:26

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