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I have designed a board that uses the ATSAMA5D225C-D1M (Cortex A5). I have mostly copied the schematic from the ATSAMA5D27-SOM1.

I am using a J-LINK PRO adapter.

I am using the atmel software framework and GCC to test my new board.

I can single step the debugger until I get to pmc_switch_mck_to_slck()

void pmc_switch_mck_to_slck(void)
{
    /* Select Slow Clock as input clock for PCK and MCK */
    PMC->PMC_MCKR = (PMC->PMC_MCKR & ~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_SLOW_CLK;
    while (!(PMC->PMC_SR & PMC_SR_MCKRDY));

    _pmc_mck = 0;
}

after which the debugger tells me

pmc_switch_mck_to_slck () at ../../drivers/peripherals/pmc.c:973
973             PMC->PMC_MCKR = (PMC->PMC_MCKR & ~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_SLOW_CLK;
(gdb)
0xdeadbeee in ?? ()
(gdb) s
Cannot find bounds of current function

So what is the meaning of all registers returning 0xdeadbeee or 0xdeadbeef? Am I missing some trap definition?

What types of causes should I look for on the clock switching issue? Debugger setting or hardware issue?

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  • \$\begingroup\$ That's almost certainly a fault address. Didn't you already ask about this overall problem recently? \$\endgroup\$ – Chris Stratton Dec 27 '18 at 0:16
  • \$\begingroup\$ No, the question was about understanding arm, it was too general and was closed. \$\endgroup\$ – Erik Friesen Dec 27 '18 at 0:22
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This is/was caused by a non working main crystal oscillator.

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