Considering the following simplified flyback schematic. simplified flyback schematic

Which has the following voltage current graphs voltage current graphs flyback

Why is there 2*Vin over the switch when the switch is turned off? And why is that change to Vin and 0 so intense?

  • \$\begingroup\$ What is the output voltage? What is the transformer voltage? What is the input voltage plus transformer ratio times output voltage? \$\endgroup\$ – winny Dec 29 '18 at 16:02
  • \$\begingroup\$ It is just a conseptual design. So the transformer has just a 1/1 ratio the Vin is just an undefined voltage and there are no losses due to latency or parasitic effects. \$\endgroup\$ – J. Joly Dec 29 '18 at 16:05
  • \$\begingroup\$ Actually V(s1) does not look like this at all and is wrong. Since there is a low ESR load, there is no 2Vin but there is V=LdI/dt and Is will get the load current reflected back (transformed and added) into I s1. T1 also has L[H] so there are 2nd order ringing too. \$\endgroup\$ – Sunnyskyguy EE75 Dec 29 '18 at 16:30
  • \$\begingroup\$ But if you put a high impedance low pass filter on switch it will attenuate the real results. to obtain 2Vin \$\endgroup\$ – Sunnyskyguy EE75 Dec 29 '18 at 16:40
  • \$\begingroup\$ Like a snubber? \$\endgroup\$ – J. Joly Dec 29 '18 at 16:42

When the power switch closes, the primary side of the transformer "sees" \$V_{in}\$ if you neglect all the drops. During this on-time, the secondary-side diode sees its anode biased at \$\frac{V_{in}}{N}\$ while its cathode is biased at \$V_{out}\$. The peak inverse voltage or PIV of the diode is thus \$\frac{V_{in}}{N}+V_{out}\$. You select the diode breakdown voltage based on this reverse-bias condition with some margin applied.

When the power switch opens, the primary-side current is scaled by the transformer turns ratio and circulates in \$D_1\$. As this diode conducts, the secondary side of the transformer sees \$V_{out}\$ as long as \$D_1\$ conducts. This voltage "flies" back to the primary side of the transformer hence the name flyback converter. The switch now sees the series combination of \$V_{in}\$ plus the reflected voltage: \$V_{sw}=V_{in}+NV_{out}\$. You have \$2V_{in}\$ at the switch terminal if \$NV_{out}=V_{in}\$ and this is a very weird example in my opinion.

The power switch must thus be selected to withstand this level plus the leakage inductance contribution.

When the primary inductance is fully demagnetized within the switching cycle (discontinuous conduction mode or DCM), \$D_1\$ stops conducting and the switch voltage returns to \$V_{in}\$. These are idealized waveforms as parasitic inductors and capacitors ring during transitions. You have more explanations on the flyback converter in this seminar.


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