The transistors you show need a body connection for proper operation. The body connection may be shared by many transistors and is not always shown explicitly on simple drawings.
For example, it is possible to use a conductive die attach so that the body of all NMOS transistors (the p substrate) is electrically connected to a metal pad in the bottom of the package cavity. A bond wire down to the metal pad provides a connection from a package pin to the body of all NMOS transistors, and this package pin would usually be grounded.
The situation is a little more complex for the PMOS transistors that are created in the n wells. There may be many separate n wells. Each n well might contain one or many PMOS transistors. Each n well must have its own
n+ diffusion that is (usually) connected directly to the highest voltage in the circuit. Some processes will specify the maximum distance from a PMOS source/drain to the n well (body) connection.
In cases where you are worried about latchup you should provide low-resistance connections to the transistor bodies. For I/O pins it's not unusual to have a ring of n+ around the edge of the n well, for example.
Silicon-On-Insulator (SOI) transistor have much different characteristics and requirements for body connections.